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preferred design for floating point comparision

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seeker_123

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Hii
I want to compare two floating point IEEE754 numbers
For this which is efficient hardware design

one with normal comparator like ( just comparing sign, exponent, mantissa of both operands with < == > sign )
or with subtraction method ( operand1 - operand2 depends on result one can decide which is greater or smaller or both are equal )


thanks
 

The subtraction method should consume more hardware resources, so the comparator version should be the best.
 

<pedantic_whore>
But but, subtraction is a comparison operation (*). How can you make that statement?
</pedantic_whore>

(*) Hell, even in physics it works like that.
 

Why do alignment + subtraction + compare when you can do the compare directly?
 

That is a completely different question. If a CPU already has the hardware for subtraction in the ALU, why use additional hardware for implementing a different type of compare?
 

std_match said:
That is a completely different question. If a CPU already has the hardware for subtraction in the ALU, why use additional hardware for implementing a different type of compare?
Click to expand...

thanks std_match
(I am already having subtraction unit in design)
So is it the case that if one is having subtraction unit then no need to go for separate unit for compare.?
Because subtraction unit is time consuming than compare unit (more delay or latency). Then I think we have to choose either between hardware efficient or timing efficient. Am I right ...?

Please correct me if I am wrong

thanks in advance
 

If you design hardwired logic there is no penalty for having both a subtraction block and a compare block in the design. A CPU is special because the same ALU is used for all operations. If you have dedicated hardware for each operation, you can select the best hardware for each instance.
 

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