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    preferred design for floating point comparision

    Hii
    I want to compare two floating point IEEE754 numbers
    For this which is efficient hardware design

    one with normal comparator like ( just comparing sign, exponent, mantissa of both operands with < == > sign )
    or with subtraction method ( operand1 - operand2 depends on result one can decide which is greater or smaller or both are equal )


    thanks

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    Re: preferred design for floating point comparision

    The subtraction method should consume more hardware resources, so the comparator version should be the best.



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    Re: preferred design for floating point comparision

    <pedantic_whore>
    But but, subtraction is a comparison operation (*). How can you make that statement?
    </pedantic_whore>

    (*) Hell, even in physics it works like that.



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    Re: preferred design for floating point comparision

    Why do alignment + subtraction + compare when you can do the compare directly?



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    Re: preferred design for floating point comparision

    thanks everyone,
    Ok means normal comparator is better. Then why arm using subtraction operation for comparison

    http://infocenter.arm.com/help/index.../Cihiddid.html

    is there any valid reason. (though this is for integer comparison)



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    Re: preferred design for floating point comparision

    That is a completely different question. If a CPU already has the hardware for subtraction in the ALU, why use additional hardware for implementing a different type of compare?



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    Re: preferred design for floating point comparision

    Quote Originally Posted by std_match View Post
    That is a completely different question. If a CPU already has the hardware for subtraction in the ALU, why use additional hardware for implementing a different type of compare?
    thanks std_match
    (I am already having subtraction unit in design)
    So is it the case that if one is having subtraction unit then no need to go for separate unit for compare.?
    Because subtraction unit is time consuming than compare unit (more delay or latency). Then I think we have to choose either between hardware efficient or timing efficient. Am I right ...?

    Please correct me if I am wrong

    thanks in advance



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    Re: preferred design for floating point comparision

    If you design hardwired logic there is no penalty for having both a subtraction block and a compare block in the design. A CPU is special because the same ALU is used for all operations. If you have dedicated hardware for each operation, you can select the best hardware for each instance.



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