[SOLVED] Slewing and Overshoot in LDO during Powerup

Hi,

I have a three stage LDO with an external capacitor and PMOS pass device.

During Power up, the external capacitor has to be charged up and hence the Pass device is fully ON, i.e., the LDO is slewing.

My problem is that in some cases/corners, the Output voltage overshoots the reference and goes till the supply voltage.
Since the pull down current is very small, the LDO takes a long time to settle back to the final voltage.

My understanding of Slewing is as follows
1. The Output will slew till it is within the input range of the Error Amplifier. During this time the gate of the Pass Transistor is low.
2. Once it is in the range, the gate of the pass device has to be pulled up as fast as possible.
3. If it is not fast enough, the output voltage will overshoot since the current coming in is much more than the current going out.
4. Once it has overshot, the settling will be determined by the pull-down current discharging the capacitor.

My questions are :
Is my understanding correct?
Can I prevent the overshoot by increasing the speed(bandwidth) of the LDO?

I think first you need to prevent overshoot. A regulator that outputs higher than desired voltage will probably damage everything it's connected to; that's why you use a regulator to begin with.

I think you are on the right track: you need to improve the response time. A regulator is a feedback system, and you should look at it as such.

@barry

Thanks for the reply.

I am trying to get a model for overshoot and slewing.
The problem is that since Slewing is a large signal phenomena, I cannot use the small signal models and Transfer functions directly.
The actual circuit used also seems to play an important part in the settling behaviour and it is not just the bandwidth of the system.

How come there are very few resources concerning the overshoot after slewing? This can happen in any amplifier and not just LDOs.

You may want to consider the startup as a special case and
treat it accordingly, rather than try to make the LDO stable
under that condition. Soft start techniques can keep the
loop from "winding up" on abrupt VIN-apply. They will also
make your product friendlier to its upstream "provider".

Hi dick_freebird

I guess in a way I am looking for a large signal stability i.e. I want a good settling to happen when the Opamp/LDO is slewing. Making the error amplifier fast enough helps since it is the one which has to react to the output and change the gate voltage of the Pass Transistor.
But there seem to be some othe

I don't want to use soft start techniques as it would require adding some more stuff in the signal path which would now disturb the loop gain/phase/etc. And Inrush current is not a problem for me anyways.

Also I am currently looking to startup with the release of power down signals alone. I have power down switches at the gates of various transistors.

Regarding the // "winding up" on abrupt VIN-apply//,
In my understanding, sudden apply of input to a system in feedback can cause overshoot because of any mismatches in the circuit. Since both the input node and the feedback node start at 0, there is no saying what the loop can do and depending on any mismatches, the output can completely swing either way.