Siva Teja
Newbie level 1
After Metastability state finally the output of the flipflop settles to eighter logic high or logic low..how it happens? what is the parameter making it possible to settle to a steady state ?
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A flip-flip has two stable states by design (due to positive feedback), so common sense rather suggests the opposite question: "How can the circuit stay in a metastable state (at least for finite time)?"what is the parameter making it possible to settle to a steady state ?
A flip-flip has two stable states by design, so common sense rather suggests the opposite question: "How can the circuit stay in a metastable state (at least for finite time)?"what is the parameter making it possible to settle to a steady state ?