Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Power Result of DC Cell Leakage Power more than Total Dynamic Power is normal ????

Status
Not open for further replies.

omar-malek

Member level 5
Joined
Mar 24, 2007
Messages
89
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
French
Activity points
1,949
i have get this resulte after synthesis

Cell Leakage Power more than Total Dynamic Power , is that normal


Cell Internal Power = 19.8773 nW (23%)

Net Switching Power = 65.3011 nW (77%)
---------
Total Dynamic Power = 85.1783 nW (100%)

Cell Leakage Power = 527.4677 uW


thank you
 

I have seen similar situation before. You may have used very fast leaky LVT lib. However it would be good to check your clock setting, have you setup clocks?
 

Hey,

Leakage -> Static and Dynamic Power -> Dynamic power dissipation

So, Leakage should be less than Dynamic Power.
Is this right ?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top