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  1. #1
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    Ethernet differential pair routing

    Hi every one,

    In Ethernet protocol routing, where differential pair signal should be routing either top layer or bottom layer? What is the guidelines of Ethernet protocol signals.

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  2. #2
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    Re: Ethernet differential pair routing

    Hi,
    Here are my suggestions to route ethernet signals. I assume the interface speed is 100Mbps:

    1. Keep the distance between PHY chip and Ethernet Transformer (magnetics) as short as possible.
    2. Route the RX+, RX-, TX+ and TX- differential pairs as 100ohm differential characteristic impedance. You can use Saturn PCB tool kit (a free calculator) to calculate trace width, distance and height above plane for characteristic impedance calculation.

    http://www.saturnpcb.com/pcb_toolkit.htm

    3. It does not really matter on which layer you route signals as long as you maintain characteristic impedance on that particular layer. However I would suggest you : to keep PHY chip and magnetics on same layer (i.e. top or bottom) you should route the signals on the same layer so that no vias are used while you make connections. Vias are lossy and create impedance discontinuities which may result in reflections. You can orient chip in a way that the differential pair reach the magnetics without stitching through other layers.
    4. Also the MII or RMII interface single ended signals are also high speed signals therefore you should keep the distace between your PHY and your Ethernet MAC controller (Usually a microcontroller or FPGA) to minimum. And if the distance is more than an inch you may use series termination resistors of 33 ohms in your MII or RMI interface signals.

    I would also reccomend you to read high speed pcb design topics from following link:
    http://www.hottconsultants.com/

    These topics are going to help you learn most of the terms and techniques used in high speed pcb design.

    Regards



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