minhthang_galaxy
Newbie level 3
Hi,
At present, I am designing a RF power amplifier. I have found a paper in IEEE entitled "Design of 2.1GHz RF CMOS Power Amplifier for 3G"(attached). Here is its schematic:
I am confused about how to model MOS transistor to calculate impdedance matching. To what extend I need to model parasitic parameters?
Thanks.
At present, I am designing a RF power amplifier. I have found a paper in IEEE entitled "Design of 2.1GHz RF CMOS Power Amplifier for 3G"(attached). Here is its schematic:
I am confused about how to model MOS transistor to calculate impdedance matching. To what extend I need to model parasitic parameters?
Thanks.