+ Post New Thread
Results 1 to 2 of 2
  1. #1
    Member level 1
    Points: 304, Level: 3

    Join Date
    Mar 2013
    Posts
    32
    Helped
    1 / 1
    Points
    304
    Level
    3

    FreePDK45 P-cell problem

    I have installed NCSU FreePDK45 design kit for Cadence IC615 but have problem instantiating device layout with the following warning.
    *WARNING* (DB-220704): The Pcell super master: NCSU_TechLib_FreePDK45/nmos_vtl/layout is not a SKILL super master. The usage of non-SKILL Pcells in Virtuoso is not a supported feature.

    I can only see a white box with cross of the device instance in layout but when I open the layout view of the device itself, it is visible with correct metal layers.

    I followed the Setup Files section of the following link to install the kit with correct paths:
    http://www.eda.ncsu.edu/wiki/FreePDK45:Manual
    and for P-Cells I have installed 64-bit PyCell Studio from Synopsys using instructions from the following link:
    http://www.eda.ncsu.edu/wiki/FreePDK45:Using_P-Cells

    I am using bash instead of cshrc shell and assume that the instruction: "Create a modified setup script for Cadence Virtuoso that includes PyCell studio" means the environment variables need to be set in .bashrc file instead of creating a .cdsinit file?

    I do not understand what I am missing and why it is not working. Please help.

    •   AltAdvertisement

        
       

  2. #2
    Newbie level 5
    Points: 88, Level: 1

    Join Date
    Aug 2013
    Posts
    10
    Helped
    0 / 0
    Points
    88
    Level
    1

    Re: FreePDK45 P-cell problem

    I am also stuck by this problem, if you have solved it, could you tell me how to do?



--[[ ]]--