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Digital circuit... Post layout power estimation

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eda_wiz

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Currently I use power compiler to do post layout power esimation of my block.
ie use the SOCE netlist and do post layout simulation to generate vcd/saif.
annotate the vcd/saif to power compiler along with the netlist, sdf to report power.

is there any more accurate method apart from doing spice?

thanks
 

Certainly you will have a better waveform, but what is your goal, and accuracy you want, and for complex system, with program... It is near to impossible.
 

rca said:
Certainly you will have a better waveform, but what is your goal, and accuracy you want, and for complex system, with program... It is near to impossible.
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i want to accurately estimate the power of a digital block after doing physical design.

what tools/methods should I use?
 

Use Primetime PX for power estimation.
 

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