some questions about <=

you can find these codes below used to light 11 led,so my question is if I change the sentence led_2<=8'b11111111;led_2<=~led_2;to led_2=8'b11111111;led_2=~led_2;the eight led(from led2_1 to led2_8)will not worked,but to my surprise,the other 3 led can well although I named them with led_yellow=~led_yellow;led_red=~led_red;led_green=~led_green; no <=!!!!!!!
another questions is always@(posedge sys_clk),if I delete @(posedge sys_clk) and only always left,all of the led can not work,
I think the code will be excuted per cycle time ,so why the @(posedge sys_clk) have so much infulence?
I use CycloneII(ep2c5q8c8n)
I am a newcomer does anyone can kindly share me some useful files? thank you





module led_2
(led_2,
led_green,
led_red,
led_yellow,
sys_clk);
output [8:1] led_2;
output led_red;
output led_green;
output led_yellow;
input sys_clk;
reg [8:1] led_2;
reg flag;
reg flag_times;
reg [27:0] delay_ms;
reg led_red;
reg led_green;
reg led_yellow;
always@(posedge sys_clk)
begin
if(delay_ms>28'd50999999)
delay_ms=28'd0;
else delay_ms=delay_ms+1;
end
always@(posedge sys_clk)
begin
led_2<=8'b11111111;
if (delay_ms==28'd50999999)
begin
led_2<=~led_2;
led_yellow=~led_yellow;
led_red=~led_red;
led_green=~led_green;
end
else
begin
led_2<=led_2;
led_yellow=led_yellow;
led_red=led_red;
led_green=led_green;
end
end
endmodule