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Modulate one Signal using programable devices

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kkdelabaca

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Hello,

I need transmit 3 different status in one sensor (Status#1, Status#2 and Status#3).
These information can be transmitted at very high speed (from 50MHz to 100MHz).

With what type of logic device (Altera) I can meet this propose? What type of modulation I can use?
Then I need demodulate the same signal with the same device.
The costs of the device will be minimum.

Thanks!
 

After see that nobody reply my answer, I think that won't be easy modulate at high frequency.

I'm a beginner with the CPLD's and I have in my hands one demo board with the device EPM240T100C5N (MAX II) from altera.

Basic questions:
- This board have one external clk of 60Mhz. This device have one internall PLL to increase the speed?
- What is the maximum speed supported for this device?
- Exist other references in the same family that works faster?
- One easy tecnique will be modulate in FSK, right?
In = 00 -> Transmit 60MHz
In = 01 -> Transmit 30MHz
In = 01 -> Transmit 15MHz
- I think that the most complicate thing is demodulate this high frequency (because is the same that the system). Right?

Thanks a lot!!
 

After see that nobody reply my answer
It's not generally bad to think yourself. I'm required to do it every day.

"Modulating" the data, I would prefer the term coding to a serial data stream, is rather easy. Decoding the data, including clock and data recovery from a bit stream is the more difficult thing. Depending on the available hardware, it's reasonable to choose the coding method for easy decoding.

I presume that you are talking about a digital channel. A simple, straightforward way is to pack the bits into an UART frame. To achieve unconditional synchronization, the idle period must be clearly distinguishable from data frame, if you have one start bit and two data bits, you need three stop/idle bits, resulting in a minimal period of 6 bit times. For the special case one-of three coding, a 4 bit period should work as well. I'm sure, you can figure it out.

MAX II has no internal PLL, it has to work with the external clock frequency.

At the receiver side, you'll usually want an at-least fourfold oversampling to recover an asynchronous data stream. This will be probably the actual speed constraint with MAX II.
 
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