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simulation error in MODELSIM

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Matlab_87

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Hi,
I have a design in System generator and it works OK when I generate HDL code in ISE
I am getting the following error in Modelsim when I I run simulation. Can anyone help me please.
**Fatal: (SIGSEGV) Bad pointer access.
#time 0 ps Iteration 0 Process:/ aproject_tb/sysgen_dut/project_x0/var_1/comp0/core_instance/u0 mem_module/line_1466file: C/Xilinx/12.1/ISE_DS/ISE/vhdl/ssrc/xilinxcorelib/BLK_MEM-GEN_V4_1.vhd
#fatal error while loading design
#error loading design
Error:error loading design
pausing macro execution
macro./ project_tb.fdo paused at line 29


Please, help me
Thanks in advance

Matlab_87
 

can u post the code ?
 

Looks like someones tried to access data without creating the memory first using an access type..
 

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