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Xilinx MGT 10Gbps interface PCB Design Questions

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asimlink

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Hi Group,

I have been designing my low to medium speed (below 1Gbps or 2.5Gbps) pcbs in Atlium Designer using FR4 material. I found Altium Designer as very easy and very smart tool when it comes to schematic design, pcb layout design, pin swapping, parameter management, output file generation.

I need to design a board in which I will have a Xilinx Virtex-7 series FPGA and will require 10Gbps serial differential (MGT) interfaces. I will need to run these multiple serial differential interfaces to an onboard device. I am looking here for some answers to my following questions:

1. I have read at some forums that Altium is not a good tool as it does not provide realtime signal integrity and power integrity analysis for above Gbps desings and it also does not provides good characteristic impedance calculations for differential signals. Also found that it is poor in definition of high speed pcb layout rules.
I would like to know can i still use Altium for 10Gbps serial designs by any means (such as by use of external calculators etc) but without any much spent time on external calculations? Are there any perticular pcb design examples that show that Altium was used for above 10Gbps pcb design?

2. If altium is not a good tool for high speed pcb design, should I move to Cadence Allegro or to Mentor tools?

3. What real advantage Cadence or Mentor tools will give me over altium when it comes to High speed pcb design?

4. If detailed routing guidelines are available, do you think the pcb design may avoid SI and PI simulations and analysis cycle for a high speed PCB?

5. How do I select best material for my high speed pcb design.

Regards,

Asim
 

Talk to a PCB manufacturer regarding PCB materials they will have Polar to work out impedences.
Simulation for this speed is reccomended, cant comment on Altium as I dont use it, but in Cadstar I can simukate those speed, but the simulation package for Cadstar (and Allegro) caosts as much as the PCB design package (you do get what u pay for). But not all bad news, use altium and get outside help to run the simulations, there are companies out there that do this. When unshure or going outside my confort zone I will alwaysuse expert help where I can.
 
Thank you so much for your valuable comments. I was very much worried about using Altium at multi gbps pcb design. but after reading your comments i think i can still use the Altium Designer, provided i can get hold of good calculators. I was looking at polar instruments (https://www.polarinstruments.com) for their various calculators. Then there are also some free online impedance calculators for differential signal impedance calculations. I would need someone to tell me (from their experiences) if these free pcb/impedance calculation tools are good too?
Thanks again for your comments!
 

They all help as does reading up as much as possible on what is becoming quite a complex job (high speed layout). The faster you go the more parasitics effect the signal.
I use Cadstar and go up to silly frequencies, at the end of the day basic layout is what we do (joining the dots:)) the rest is just add ons and simlators, so all tools can perform the basics.
 
I would like to know further how to design following pcb structures for high speed / high data rate desings above 5 to 10 Gbps:

1. how to design a high speed via for particular characteristic impedance?
2. how to design high speed fan out connection for a bga package and for a particular characteristic impedance?
3. How to incorporate package / pins and parasitic and length mismatches at IC level and do we really need to care about them for 5 to 10 Gbps data rates?

Thank you so much for your valuable comments.
 

1. HDI:
https://www.hdihandbook.com/
2:
https://www.pa.msu.edu/hep/atlas/l1...ntorpaper_bga_breakouts_and_routing_52590.pdf
3: simulation, IBIS filesfor active devices. Some IBIS files have the data inbuilt from the PCB pin to the actual silicon, for 5 -10Gbps I would care about these extra parasitics.
https://www.analog.com/static/impor...7601441968349653493056536126553742AN715_0.pdf
Thanks marce!

- - - Updated - - -

I have found two free PCB calculation tools:

1. http://www.mantaro.com/resources/impedance_calculator.htm
Calculators for both single ended and differential characteristic impedance

2. http://www.saturnpcb.com/pcb_toolkit.htm
A free Windows application that eases you with lots of high speed pcb design and thermal / heat dessipation calculations

Thought it'd be beneficial for others. I guess such free tools and combination of any decent pcb design tool (that can let you edit advance properties of vias, pad stacks, tracks properties, allows design rules) can let you design high speed pcbs.

It may be tedious to do lots of calculations by using external tools but is yet another possible and a low cost way of doing high speed pcb design. correct me if i am wrong!

There are some tools from Polar instruments (http://www.polarinstruments.com/) as well such as:
1. Si8000
2. Speedstack

But dont know as how the free tools such as mentioned previously and the tools from polar instruments compare?

Regards!
 

The Saturn PCB toolkit is used by almost every PCB designer I know in the UK, it is one of the most usefull tools for PCB designers out there.
The polar tools are cool, but expensive, I just chat nicely to my favorite PCB manufactureand get themto do it.
 
I am using Saturn PCB toolkit to calculate trace characteristic impedance. The Saturn PCB toolkit asks you to select two things which are related with copper thickness:

1. Base copper weight
2. Plating thickness

Questions:
1. Normally i have seen that the PCB manufacturer only specify that the copper weight is 0.5Oz (.7mils) for all planes and signal layers. Does this copper weight that the manufacturer usually specify, is actually the finished thickness of the copper (that is Base copper weight + Plating thickness)

2. Does all layers in a multilayered pcb get plated after etching? or are these only top and bottom signal layers that are plated?

Regards
 

Only top and bottom are overplated, usualy base weight + approx 0.020mm but as this quote from Sunstone circuits says:
This is total thickness of copper on the board surface. The value is determined from the copper foil thickness, plus plated copper, minus copper removed during surface preparation.I would check with your PCB manufacturer. As a rough guide 0.035mm comes out at 0.052mm.
 
Can we use HSPICE SI from Synopsys for simulation of routed high speed pcbs? like we can do using Hyperlynx?
In case of Hyperlynx i know Altium Exports .HYP file format for Hyperlynx to import pcb design. I am not sure if that sort of procedure could be done with HSPICE SI?

Regards
 

Dont know, I use Cadstar and use the Cadstar add on tool SI verify, sorry.
 

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