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    Why we fix SETUP Violations and then fix HOLD violations

    Need little bit explanation on Why we fix SETUP Violations and then fix HOLD violations

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    Re: Why we fix SETUP Violations and then fix HOLD violations

    Simple during pre-cts no actual clock will be preset and hence no need for hold check. We will clear set-up violations, do CTS and fix hold violations if any occur.



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    Re: Why we fix SETUP Violations and then fix HOLD violations

    My question after clock tree expansion why do we target setup first and then hold and why not vice versa.



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    Re: Why we fix SETUP Violations and then fix HOLD violations

    i am assuming, that clock tree expansion means after CTS. Since, during Pre-cts. the actual placements of the flops comes into the picture and until this point the clock is not yet in propagated mode. Also, there is no point/chance of the hierarchy changes can take place.so In this phase we concentrate on setup and leave the hold violations for next level that is CTS and post cts. In this phase, we fix hold and using the skew information to fix the hold.

    There is not such thumb rule, that we have to fix to setup first and then hold. its just like that we fix setup because its purely deisgn based i.e it depends on the design hierarchy.



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    Re: Why we fix SETUP Violations and then fix HOLD violations

    Hi dftrl,
    Setup timing analysis is done at the stage of placement because at the stage of placement if there is any setup violations then it is fixed only by making changes on data path(like inserting buffers,using LVT cells,cell upsizing) but we don't touch the clock path and at this stage clock is not propagated so,skew and insertion delay doesn't come into exsistance.So,set up is fixed at the stage of placement and hold is fixed after the CTS as clock is being propogated,Skew and insertion delay come into exsistance after CTS...,
    Thanks &Regards,
    D.Raviteja



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