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Not a very clear question. I guess, the 100 Hz ripple will be present in the DC bus voltage and not particularly caused by the half-bridge converter? Then you would either try to reduce it by voltage feedback or possibly bus voltage feed forward.
First of all,thank you for your reading and helping
My colleague designed a SMPS, its input voltage rang is 90VAC to 265Vac, output voltage is 54vDC, and load current is 1.6A. The circuit of the SMPS is composed by two stages, a front-end PFC implementing the L6563S and a LLC half-bridge DC/DC converter, which using the controller, L6599.
As you know, the PFC output voltage has a 100Hz ripple, which is about 5V to 10v.
As I have not experience in designing a LLC half-bridge, so I would like to know whether the LLC converter can completely deal with the 100HZ ripple problem?
If you designed LLC converter, could you tell me whether the output ripple have 100HZ ripple and its peak-peak voltage amplitude?
I doubt that you can easily achieve a better 100 Hz line regulation quality with a LLC converter. This is due to the resonant circuit Q and respective limited feedback loop bandwidth. As previously mentioned, I would try feedforward. Trimming the loop compensation for higher 100 Hz gain can be tried, but the load step response performance may become worse.
LLC converters, from what I've read, have inherently slow response times relative to other topologies. However getting control bandwidth in the range of 1KHz should be doable for an LLC. Using a higher resonant/switching frequency may be necessary though. LLC control theory is very bizarre stuff....
1 kHz loop bandwidth is a realistic number. But it won't be sufficient to achieve a 100 Hz line regulation quality the original poster is apparently looking for.
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