sakthikumaran87
Full Member level 3
Hi All,
If any of you know any good materials on SDC's DRC like set_max_capacitance, set_max_fanout etc. kindly share with me. My primary doubt is that: I can understand that the set_max_capacitance is related to specifying the maximum capacitance value each node can have in the chip but i dont know how setting this value in SDC is related with the original capacitance value in the lay-out.
Thanks in Advance,
SK
If any of you know any good materials on SDC's DRC like set_max_capacitance, set_max_fanout etc. kindly share with me. My primary doubt is that: I can understand that the set_max_capacitance is related to specifying the maximum capacitance value each node can have in the chip but i dont know how setting this value in SDC is related with the original capacitance value in the lay-out.
Thanks in Advance,
SK