I am trying to design a switch cap DC-DC converter in Cadence (Spectre 6). I tried to use ideal switches and caps. With just an output cap, converter converged to desired value in transient simulation. When I tried to add a dc Iload in paralle to Cout (to model the loading circuitry behind it), the converter converged to weird values (MV)? Is there a way to get rid of this issue?