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    matlab to VHDL/ verilog converter

    I need to convert matlab code to VHDL/Verilog. Is ther any tool available for this purpose?

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    Re: matlab to VHDL/ verilog converter

    Mathworks provide HDL coder (about $10,000 per licence or something).
    But be aware that Matlab -> HDL is not a simple process as only a subset of matlab can be coverted.


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    Re: matlab to VHDL/ verilog converter

    It may not be what you want but, if you can design your system with Simulink, you can find corresponding blocks at Xilinx Blockset in Simulink. System Generator for DSP is usable tool while designing a system. It seems like Simulink however it is synthesizable, optimized because System Generator get Xilinx blocks together.


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    Re: matlab to VHDL/ verilog converter

    thank you. among these two converter which one is the easiest one for my purpose? My matlab code has many real values rand functions . mathematical complex functions etc.For this conversion which one is suitable in these two?



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    Re: matlab to VHDL/ verilog converter

    If your purpose is just generating VHDL code, MATLAB HDL Coder is suitable. However, it generates lots of files, and most of time result is not suitable for FPGA bitstream generation.
    SystemGenerator is nice tool, it allows you to design your system with IPCores like designing in Simulink.
    If you knew IP CoreGen, SystemGenerator allows you to connect IPCores like Simulink blocks.
    There are lots of IPCore blocks,such as filter, fft, multiplier, dds, cordic, divider, etc..., Also you can write your own mini MATLAB code such as blocks and connect this block with ready-to-use IPCores.
    But, Matlab codes should be as simple as possible to get fine results. Synthesizer tries to solve your code and if it is complex, your design becomes slower and uses high resources.

    SystemGenerator convert your design into HDL, NGC or bitstream as you want. Find out tutorials of SystemGenerator, read it.
    MATLAB HDL coder isn't a good solution for big and aimed-to-synthesized designs but, SystemGenerator is created for this purpose.

    If you can't convert your solution into IPCores, try to make your design simpler or try to understand the blocks. Anyway, you can get some results with SystemGenerator.



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