My circuit is a decoder. I have created the layout of the circuit. I am using assura ams H35. And i have already passed successfully from DRC and LVS runs. The next step is to perform the parasitics' extraction and run post layout simulations.
But when i perform the parasitic's extraction, I get this error

ERROR (LBMISC-215479): at "Techgen -trans": Connect layer 'net_pwell' from lvsfile is declared as stamped layer in p2lvsfile.

I checked the p2lvsfile. The net_pwell is declared like this:
pro_layer=fox ext_layer=net_pwell,net_nwell,net_psub other_ext_layer=pnpvert10_c,vertph_c stamp=2 ;

Can anybody explain what the stamped layer is? and help me solve this problem?

thanks a lot