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[SOLVED] Transistor mismatch in opamps/current mirros

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engrMunna

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I have opamp (see attached figure) I am doing its Montecarlo simulation in cadence spectre. This is low power application so the current in the branches are about 25nA. The problem is that the currents are matched relatively good like only a 4 to 5nA of difference in the branches. But the node voltages are very different. for eg. for the bottom current mirror made of NMOS transistors M21 M22, the drain voltages vary alot in montecalro simulation (about 0.6 V to 0.2 V where as my Vdd is 0.8V). And due to this, if I simulate the openloop gain in Montecarlo simulation, it varies like from 5000 down to 20 or 30 for multiple runs.
Any suggestion please?
NOTE: The sizes of transistors may be a bit different from the ones shown in the picture. but u can assume the same sizes

 

That's a +/-10% current error. That does not qualify as "relatively good".
Do a dcop on the worst MC run, and check the operating modes for all the FETs.

Also, it will be useful to provide your testbench.
 
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Thanks for the reply....well I have figured out that I need DC offset cancellation loop. I was not familiar with this concept before..So I guess I'll have to start a new thread or if someone can post here any simple offset cancellation loop circuits for single ended opamps?
 

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