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wide swing cascode current mirror

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majerio

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i understand for a wide swing cascode current mirror the width for the biasing transistor(M5) is .25 size the rest of the transistor. how to determine the value for W/L is for all the transistors and how keep the transistor where the output transistor(M1) is taking from in saturation

wsccm.png
 

Hi Majero,
The main mirror M3 and M2 need to be sized according to the matching you need between your input and output current. With that size you can look at the Vdsat you get, if that is not enough you can increase the size more. Once you have sized that sufficienctly, you can size M1 and M4 as large devices so that they have a minimum vdsat. The only limiting factor on M1 and M4 would be the size you are willing to spend. Now you have the need to size M5 with whatever current you decide to bias it with so that its Vgs = Vgs(M4)+Vdsat(M3)
 

aryajur said:
Hi Majero,
The main mirror M3 and M2 need to be sized according to the matching you need between your input and output current. With that size you can look at the Vdsat you get, if that is not enough you can increase the size more. Once you have sized that sufficienctly, you can size M1 and M4 as large devices so that they have a minimum vdsat. The only limiting factor on M1 and M4 would be the size you are willing to spend. Now you have the need to size M5 with whatever current you decide to bias it with so that its Vgs = Vgs(M4)+Vdsat(M3)
Click to expand...

hello Aryajur,
from reading your comment, my assumption that all transistor have the same size expect m5 is wrong.
if i know what i want my input and output current to be is there a way to determine the size of the transistors and how to get the highest output resistance? or the only way to do it is to keep changing the transistor until i get the right size?

thank you Aryajur
 

Hi Majerio,
If you know your input and output current and the kind of accuracy you need then you can start. For example if input is 100uA, output is 200uA with accuracy of +/-5% then you can back track it to the size using the accuracy formula:

dI/I = 2dVth/Vdsat

where dVth = k/sqrt(W*L) where k is the matching coefficient for the device provided in the models.

Once you set the main mirror size you can set the vdsat of the cascode according the swing requirement and then get their size from that. You can fix the L and W for them by choosing an L that gives you good output impedance by plotting the output impedance of the device with a sweep of the L.
 

do Vds have to be the same for the top 2 transistor and the bottom 2 transistor?
 

Do you mean vdsat for M1 and M2 need to be the same? No actually M2 should have as large a Vdsat you can afford to improve matching and M1 should have as small a Vdsat you can afford to improve Vgs matching which would help equalize the drain voltages of M1 and M3.
 

i was told the drain to source voltage should match for the top transistor and the bottom transistor
 

M2/M3 is the greatest contributor to mismatch. So it needs to be designed for large A and large vdsat.
M4/M1 is to be designed for large gm for high output impedance.
M5 is to be sized such that M1/M2/M3/M4 is operating in saturation.
Lastly, run all corners to ensure all transistors are indeed operating in saturation.
Run Monte Carlo if you want to estimate the mismatch you would see.
 
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