Binary Addition and Subtraction, Magnitude Comparator

P1. Draw the circuit diagram of a 4-bit adder which can add 4-bit binary numbers and
display the result on a 7-segment display. Assume that the sum results can never exceed
the number 9. Furthermore design an overflow detection circuit which will light up an
l.e.d. when the sum exceeds 9.

P2. Using two 74LS83A adders, modify the circuit in P1 such that the sum output from
the first adder is transformed to BCD output when the sum exceeds the value of 9 (via
addition of 6). Hence draw the modified circuit which is capable of adding two 4-bit
numbers and displaying the sum on two 7-segment displays. Assume that the sum never
exceeds 19. Also design a circuit which will light up an l.e.d. when an overflow occurs.

P3. Modify the circuit in P2, such that is can either add or subtract two 4-bit digits,
depending on a control input. Use 74LS86 2-input XOR gates to implement the 2’s
complement function.

P4. Devise a test setup in order to verify the 74LS85 magnitude comparator's operation.


Can someone please help me with these questions? I'm a beginner at this and it's a bit overwhelming.