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    [MOVED] how to remove this error in xilinx

    ERROR:HDLCompilers:110 - "C:/Xilinx92i/NFC/piccA_noF1.v" line 81 Least significant bit operand in part-select of vector reg 'temp1' is illegal



    i have to compare a array temp1[7:-temp]== uid[39:-temp];

    my temp value keeps on changing and i have written as above i am getting the error as above how to write this with out any error plz helpme

    Thank u in advance
    The most beautiful thing we can experience is the mysterious. It is the source of all true art and science.
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    Re: how to remove this error in xilinx

    As far as i know,in verilog the range values must be a constant

    also i think u must post this in fpga group, to get better response..



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    Re: how to remove this error in xilinx

    Can you post the part of ur code here so that we can correct it and show you how to do it right?



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    Re: [MOVED] how to remove this error in xilinx

    "memcoll [1]<=rxmemory [1]- 8'h20;
    temp<=memcoll [1];
    temp1[7:-temp]== uid[39:-temp];"

    this is my code plz help
    The most beautiful thing we can experience is the mysterious. It is the source of all true art and science.
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    Re: [MOVED] how to remove this error in xilinx

    memcoll [1]<=rxmemory [1]- 8'h20;
    temp<=memcoll [1];
    temp1[7:-temp]== uid[39:-temp];

    What I understand from ur code is temp and temp1 are 8 bit variables
    and this is what you want to do!
    case (temp)
    0 : equal = temp1[7]== uid[39];
    1 : equal = temp1[7:6]== uid[39:38];
    3 : equal = temp1[7:5]== uid[39:37];
    4 : equal = temp1[7:4]== uid[39:36];
    5 : equal = temp1[7:3]== uid[39:35];
    6 : equal = temp1[7:2]== uid[39:34];
    7 : equal = temp1[7:1]== uid[39:33];
    default : equal = temp1[7:0]== uid[39:32];
    endcase


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