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    Replacement of the Low-Vt cells with Hi-Vt cells on the critical paths -> How-to

    Hello All,
    According to the vendor's methodology, I should synthesize my design with two runs.
    On the first run, I should use the Low-Vt cells only.
    On the second run (if there are timing violations), I need to replace Low-Vt cells with High-Vt cells on the critical paths only (or vice versa, I don't remember . which one of them is faster?).
    The tool, which I use, is RTL-Compiler from Cadence.
    My question: how is it possible to replace cells just on critical paths and preserve cells on the rest of paths? What command should I use and how should I guide the tool to do so?
    Thank you!

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    Re: Replacement of the Low-Vt cells with Hi-Vt cells on the critical paths -> How-to

    LVT - faster cells, high power
    HVT - slow cells, less power

    Strange... the vendor told you that.
    I would suggest to have a single execution with both the libcells available and use the following attributes
    --
    max_leakage_power
    power_optimization_effort
    --

    This should help you with a good leakage power saving. Also there was a time when the flow that you suggest i.e. two pass flow was used where mapping was executed with HVT and then during IOPT only was the LVT cells opened. So the paths that met timing did not use more of leaky cells i.e. LVT but only the paths that violated timing.

    Although from my experience off late such a flow is not required and it does a good job using the above settings itself.
    Sharing Knowledge only increases it further...

    cheers
    ed !!


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    Re: Replacement of the Low-Vt cells with Hi-Vt cells on the critical paths -> How-to

    According to the vendor's guide lines, the second run should be performed with '-in_place' switch of the synthesis.

    "max_leakage_power & power_optimization_effort" what tool the attributes belong to? Would you please provide a whole command line?

    Thank you!



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    Re: Replacement of the Low-Vt cells with Hi-Vt cells on the critical paths -> How-to

    So... Ur executing RC Physical. Still my take is that the earlier two attributes should take care of it until you see too much usage of LVT cells.

    The attributes being to RTL COMPILER.
    --
    set_attr max_leakage_power 0 /designs/*
    set_attr power_optimization_effort medium /
    --
    Sharing Knowledge only increases it further...

    cheers
    ed !!



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    Re: Replacement of the Low-Vt cells with Hi-Vt cells on the critical paths -> How-to

    Тhank you!



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