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Reduce ringing using EMI filter block

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gdylp2004

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Hello,

I've a +28V DC output from a SPMS Buck converter with a ringing phenomenon of 2V peak (or 4V pk-pk) as could see in the attached.

I've tried using many methods like:

  1. RC snubber across switch node
  2. RC snubber across V(gs) or even V(ds)

But all seems to be useless. Recently, I've read about EMI filtering blocks and I've bought one to use (Model: BNX002-01 **broken link removed**). See attached.

Unfortunately the results (as in the ringings) never change.

The ringing period I've measured is about 80ns (hence about 12.5MHz).

Also, I've already separate the Analog GND with the power GND to reduce cross talk, and have packed all components as closely as possible. If assuming the buck system could no longer be modified. There should be something I could utilise?

And I would like to know if that something is it a form of filter, ferrite bead, EMI filter block, customised 2nd-stage filter using 2*pi*f = 1/√(LC)?

Looking at the effective suppression frequency range (underlined in red), could anyone tell me why on the EMI filter block is not suppressing any of the transients at the very least?

Please note I've already seperate the control circuit GND with the power GND but to no avail.


I just need a direction so that I could start researching on that part! Please help!


What EMI block should I use? Anyone could help me?
 

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Because of the high frequency content of this ripple, some special measurement techniques must be employed so correct measurements are obtained.
Please make sure the wires are as short as possible. The classical ground clip placed in a field of radiated high frequency energy, acts as an antenna pickup loop, therefore the conventional ground clip on an oscilloscope probe should never be used in this type of measurement.
The additional noise pickup must be eliminated by using a scope probe with an external ground band and connecting this band directly to the output ground terminal.
 

Good advice. A good check to see if the ringing is caused by your oscilloscope probe grounding is to probe your ground point. More often than not you will see the same ringing. It means it is time to dig out the spring tip grounded probes.

Keith
 

By suspecting the root cause of the ringing may comes from the faulty o-scope ground clip, do you imply that the EMI filter block I've used, should have eliminate or suppress the ringing if the problem was from the circuit?

In other words, the EMI filter block should damp the noise but if it is not, it could be the probe problem?
 

Placing the EMI filter on the input doesn’t help here. These spikes can be reduced by adding snubbers, but before doing that it is best to have a better PCB layout first. It is important to keep the ground trace short so that ground bounce cannot effect the output voltage regulation.

**broken link removed**



Supplementary some good quality low ESR capacitors placed as close as practicable across the load will give the best ripple and noise performance.
To reduce output ripple, it is recommended to use additional inductors or small ferrite beads connected in series with the output lines.
 
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I am using asynchronous buck converter (with FW diode) and have tried adding a RC snubber. My calculations for the snubber parameters are about Csnub = 100pF and Rsnub =160ohms but when I checked the output wave form, little has changed.

Following, I've then throw away the 160ohms and increase Csnub to about 300pF until I saw a 1V peak noise attenuation (3V -> 2V pk). However I then proceed to increase Csnub to 500pF, 1000pF, 2200pF and the peak noise voltage no longer attentuates further.

I've read about reducing the size of Rsnub could improve the overshoot voltage, but now I've already removed totally Rsnub, whats really left is the ESR of the cap really.

Could I know in this case, if I would like to supress the noise transient magnitude to say, perhaps 0.5V or less, what really I could do?

The ground plane is already the shortest I can do in terms on a stripboard.

My schematic (before RC snubber added at SW node) is newly attached.
 

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Placing the EMI filter on the input doesn’t help here.

I would just like to clarify isnt page 4 of **broken link removed** fully describe my difficulty, so why doesnt this helps?

Also, do you meant output filter?
 

Adding a filter it is more of a stop gap measure, suppressing it right at the source is the better way of doing it.
 

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That is why I firstly tried adding a RC snubber but failed, and now Im looking for alternative, which is a 2nd stage LPF filter. And I still wonder how comes the filter block I used is not working despite clearly indicated in the datasheet that the unit has the capability to suppress noise of 1MHz - 1GHz!
 

From the pictures you have attached I was assuming you have placed the filter on the input power lines. That's correct?
Adding a low-pass EMI filter on the input lines is designed to reduce high frequency currents getting into the power line and to prevent interference on the other devices connected to the electrical wiring.
Based on this idea, placing a EMI filter on the input doesn’t reduce the output noise.
 

By suspecting the root cause of the ringing may comes from the faulty o-scope ground clip
Noone has been talking about a faulty ground clip. The problem is about inappropriate measurement methods.
The ground plane is already the shortest I can do in terms on a stripboard.
mister_rf has been talking about a better PCB layout. A realistic conclusion could be: You simply shouldn't expect better results from a stripboard. But I guess, even a stripboard can perform better.

My problem with the filter discussion is, that it requires to define a clear circuit topology, particularly for the ground net, first.

The opening photo with the oscilloscope probe ground connected "anywhere" or not at all is just an extreme example of the undelying problem. You can place an output filter and suppress interferences at the filter terminals, but in your "wire entanglement", the interferences are returning through a different path. Your circuit is a network of N nodes and M branches. EMI suppresion means to keep switching currents/voltages inside a restricted circuit part and avoid spilling into the remaining network. Ground topology inside the switching circuit and it's connection to the outer world is a key problem in this regard.

P.S.: A remark unrelated to the present discussion. You have a strange SW2 element in your simulation circuit, apparently intended to model core saturation. It seems far-off from a realistic behavioral saturation model. If you want to include saturation effects, you should refer to the quite powerful non-linear inductor model of LTSpice instead.
 
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From the pictures you have attached I was assuming you have placed the filter on the input power lines. That's correct?
Adding a low-pass EMI filter on the input lines is designed to reduce high frequency currents getting into the power line and to prevent interference on the other devices connected to the electrical wiring.
Based on this idea, placing a EMI filter on the input doesn’t reduce the output noise.

Didn't know that the photo will mislead you, sorry about that. I've drawn the schematic on top of the photo. The filter is at the output.

I used to connect all the GND on a copper strip but until I introduce the EMI output filter, I've then severed it and only connect the control GND and power GND at the point marked with CG.
 

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The input supply ground connection isn't shown in your photo. you should be aware, that the switched current of a buck converter is commutated to the input side. A single 100 uF electrolytic capacitor will be hardly able to "absorb" it.

The separated control ground must be feared to introduce new problems, e.g. a common mode voltage superimposed to Vgs.
 

Im glad I have the layout with me. I've severed a point (marked with red X) and added solder so that the AGND (or control GND) are routed onto another separate dedicated track. The only point where this AGND and PWR GND meets is between the EMI filter block (PSG and CG respectively). With the probe GND connected to CG, am I doing the right thing if I have rearranged the wires?

Edit: The input +100V supply's GND is also connected to CG, should it be placed in PSG instead? Also, the e-load's GND has been connected to CG too. :shock:
 

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O.K., I see that no control ground separation problem for Vgs exists due to the IR2117.

But the question of input supply connection holds. You are connecting Vin+ through a cable or clip to the input capacitor. But where's Vin- connected?
 

O.K., I see that no control ground separation problem for Vgs exists due to the IR2117.

But the question of input supply connection holds. You are connecting Vin+ through a cable or clip to the input capacitor. But where's Vin- connected?

Thank you FvM for this bullseye observation. My Vin- is connected to CG of the filter, that is, outside of the filter where in the end it meets the AGND.
I hope when I connect this Vin- to PSG instead, I'll get a good suppression of noise out there. Furthermore, could I know if it is correct to connect the e-load negative terminal to CG and not PSG?

I would infact like to add on my observation. From the first photo in my maiden post in this thread, it could be seen that the ringing always occur (or occur the most) when V(gs) rings as well. I've read quite in details about the miller effect that should be the reason which cause this ringing (I've attached again with a yellow circle). Basically the charging of V(gs) are splitted into 2 phases. I've tried to suppress this ringing by 1) introducing an external cap across V(gs), this works very little but in the end and it just prolong the "overall" turn-on time rather than the initial phase 2) tried introducing external cap across V(ds) but this also produce little effect. I understand that this ringing, again could be caused by the parasitic element in my stripboard, but are there any good way to stop this ringing, as I believe with this transient gone, so will the high freq noise at the output.
 

I noticed the non-monotone Vgs waveform. But without knowing the exact measurement conditions, it's likely to jump into conclusions. Vgs is floating, you'll need a good differential probe to measure it correctly in this circuit.

You can interprete the zoomed waveform also this way: The ringing is already initiated by the rising edge of Vgs. It may be the case, that a small oscilllation of Vgs is further increasing it, but it would be there with a monotone Vgs rise as well. It's completely plausible, that oscillations are observed at the switching edges, if a circuit is able to oscillate.

On the other hand, slower Vgs edges will very likely reduce ringing. Switching speed can be most simpy reduced by increasing Rgate. Unfortunately, switching loss will be increased, too. It may be a necessary concession to stripboard layout.
 

I noticed the non-monotone Vgs waveform. But without knowing the exact measurement conditions, it's likely to jump into conclusions. Vgs is floating, you'll need a good differential probe to measure it correctly in this circuit.

You can interprete the zoomed waveform also this way: The ringing is already initiated by the rising edge of Vgs. It may be the case, that a small oscilllation of Vgs is further increasing it, but it would be there with a monotone Vgs rise as well. It's completely plausible, that oscillations are observed at the switching edges, if a circuit is able to oscillate.

On the other hand, slower Vgs edges will very likely reduce ringing. Switching speed can be most simpy reduced by increasing Rgate. Unfortunately, switching loss will be increased, too. It may be a necessary concession to stripboard layout.

Increasing rgate will prolong the on time for the high side switch. Not only does it increase my switching loss, it alters my duty cycle (reducing it) as well.

I've been advise to add a RC snubber across +Vin and PWR GND! However I've read that adding a smaller cap in parallel with a already dominated by a huge capacitor path is of little use mainly because capacitance add up when in parallel.

As we already know from my circuit there is a 100uF bypass cap at +Vin, would the additional RC snubber, like the method above, say 100 ohms and 100pF works ??
 

Increasing Rgate increases losses, snubbers do as well. From an efficiency point of view, minimal Rgate and no snubbers are preferable.
I already said a kind of "final words" in this regard:
Unfortunately, switching loss will be increased, too. It may be a necessary concession to stripboard layout.

I've been advise to add a RC snubber across +Vin and PWR GND! However I've read that adding a smaller cap in parallel with a already dominated by a huge capacitor path is of little use mainly because capacitance add up when in parallel.

As we already know from my circuit there is a 100uF bypass cap at +Vin, would the additional RC snubber, like the method above, say 100 ohms and 100pF works ??
Placing a lossy network across a bypass capacitor is like a confession that you don't manage to provide appropriate low impedance bypassing for your circuit. But 100 pf + 100 ohm is about useless in this relation. You would primarly think of microfarad ceramic caps to be supplemented to the electrolytic capacitor. If series R at all, then in a few ohms range. Basically, the R of a snubber can be tuned to the characteristic impedance of the resonant circuit.
 

Blue waveform - Vs w.r.t. Power GND(PSG)
Green waveform - V(gs)
Yellow waveform - V(out) w.r.t CG (or output filter's GND)

2.jpg shows w/o RC snubber:
Noise pk-pk is about 3.5V (Bad!)

3.jpg shows RC snubber connected across V(s) and PSG with R= 8ohms, C = 820pF:

1.jpg is when I increase Rgate slowly using a potentiometer:

This method seems to be the best for attenuating output voltage noise to about only 1V pk-pk!
But the consequence is high, it causes my nMOS to heat about mor than 160 degrees celcius!

I intend to use heat sink to cool the MOSFET out.

Besides this? I've tried bypassing V(d) w.r.t. PSG but all are rather useless.

Have also known that increasing RC snubber would somehow damp the rising edge at V(s) w.r.t PSG, but there is a limit I can go. Basically 820pF seems the best.

I've also seperate AGND with PSG so that both GNDs are only connected to each other through the muRata filter.

Really at wits end to suppress this noise. Attached is the bigger view of my table. Hope can receive more suggestion.
 

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