multiple multiplication's vhdl

Hey,

I'm working on an adaptive filter, using the CMA algorithm ..

This algorithm need multiple multiplications according to the formula : f(n+1) = f - (e*y*x*µ)

with x = input
y = output
e = error
µ = stepsize
f and f(n+1) = current and next coefficient weight

now the input and output that i'm using is an 8 bit signed signal, the stepsize is a small number (0,001 ex) and the error is equal to e = 1- y^2

i'm having difficulties in how i should implement this equation.

What i'm thinking of now is to do it as followed :

y*x = 16 bits

then multiple this with the stepsize that also is a signed 8 bit signal .( that i use as fixed point 2,6)

so this gives me a 24 bit signal, then scale it down according to the fixed point multiplication.

then i truncate this to an 8 bit signal, and multiply it with the error signal (also a 2,6 fixed point) again perform scaling and truncation.


is this the way it should be done ? i feel there is a better solution .. :s

your comment's are much appreciated.

greetings, alex.

this sounds all rather complicated.

Its much better just to specify what range and accuracy you need. Then the number of bits required is fairly obvious.