Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[LogicDesign] Fixed Point Arithmetic Implementation [Tutorial/Guide]

Status
Not open for further replies.

ivlsi

Advanced Member level 3
Joined
Feb 17, 2012
Messages
883
Helped
17
Reputation
32
Reaction score
16
Trophy points
1,298
Activity points
6,868
Hi All,

Would anyone recommend a GOOD Tutorial/Guide on the implementation of the Fixed Point Arithmetic?

Interview questions related to the subject are welcomed as well!

Thank you!
 

I mean the HW (ASIC/FPGA) implementation of the Fixed Point Arithmetic (adders, substructors, multipliers, dividers, modulo-dividers, etc)
 

I need the same, but in Verilog :)
 
VHDL, Verilog. Same same but different. Same ideas, different syntax. Not too difficult to translate. If you're not too lazy.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top