153rd
Member level 1
Hey guys,
I have a question regarding RAM.
I want to show something on a VGA monitor( in 320 x 240).
I have to make a video driver, and I use 3 bits for color( 1 red, 1 green, 1 blue).
The video driver reads data from the RAM memory.
What I can do, is make an array of (320 x 3) x (240) ==> 960 x 240.
But this is a bit cumbersome if I'd want to change the image, I'd have to change each bit manually.
The only way I know to make RAM is : type RAMTYPE is array( x downto 0) of std_logic_vector(y downto 0);
I tried to use array(x downto 0) of array(y downto 0) of std_logic_vector(z downto 0),
wich (as expected ) didnt work.
Is there a way to make a 3D array in VHDL?
I have a question regarding RAM.
I want to show something on a VGA monitor( in 320 x 240).
I have to make a video driver, and I use 3 bits for color( 1 red, 1 green, 1 blue).
The video driver reads data from the RAM memory.
What I can do, is make an array of (320 x 3) x (240) ==> 960 x 240.
But this is a bit cumbersome if I'd want to change the image, I'd have to change each bit manually.
The only way I know to make RAM is : type RAMTYPE is array( x downto 0) of std_logic_vector(y downto 0);
I tried to use array(x downto 0) of array(y downto 0) of std_logic_vector(z downto 0),
wich (as expected ) didnt work.
Is there a way to make a 3D array in VHDL?