prakashvenugopal
Advanced Member level 1
Hi,
I had designed the FPGA board with ( XC3S50AN) (TQ144 Package) as attached image. In that FPGA IC, the red mark Portion is heat sink.? we should not have plated through hole in that area? I had placed the decoupling capacitor with Plated through hole in that area. Please let me know.
Thanks,
V. Prakash
https://obrazki.elektroda.pl/58_1325825377.jpg
I had designed the FPGA board with ( XC3S50AN) (TQ144 Package) as attached image. In that FPGA IC, the red mark Portion is heat sink.? we should not have plated through hole in that area? I had placed the decoupling capacitor with Plated through hole in that area. Please let me know.
Thanks,
V. Prakash
https://obrazki.elektroda.pl/58_1325825377.jpg