need help with designing QPSK modulator/demodulator

You can use a ROM for your QAM mapping, you can found rom example in ise template, so you use address like data input and data like your map output.
Escuse I don't speak english well.....MOC

I found out a way of generating the I and Q symbols algorithmically with gray mapping. I've used it for QPSK and 16QAM. I will explain it for 16QAM. The following table lists the output symbols given the four input bits (Remember that we have to wait for 2 bits to generate a QPSK symbol and for four bits to generate a 16QAM symbol so we should think a little about the output timming).

Input Bits Output Symbols (I Q)

0000 [1 1]
0001 [3 1]
0010 [-1 1]
0011 [-3 1]
0100 [1 3]
0101 [3 3] (and so on....)

The two most significant bits determine the Q symbols and the two least significant bits determine the I symbols. We need two cases then to make the 16QAM symbols. I guess this is an easy way to put the theory for QAM/QPsK into simple VHDL programming.
Im interfacing the 16QAM modulator with and IFFT for an OFDM modem so the output will be in two's complement and with 24 bits vector length (this can be wastefull I guess, but it can be easily be changed to a 2 bit vector and dummy bits for the 22 other bits). Im attaching both the QPSK modulator (which only uses one case) and de 16QAM demodulator.
Ive tryed to think about an all PSK/QAM modulator with this algorithm but I think its easier to use distributed ram and map the necessary incomming bits to the RAMs addresses to get the symbols. This will use a very small memory to support all 3G standard specification (BPKS, QPSK, 8PSK, 16QAM and 64QAM optional). Ill post it when I get it done.

Talking about phase changing using DDS... I think it is easier to modulate the sine and cosine functions with the modulator symbols (i.e multiply the signal times +/-1 or +/-3) and then add. Orthogonallity will be preserved and you can probe it with a pencil. This works even for 8PSK using the amplitudes given by the unitary circle.

Mario.

The thread looks like a good material... im also trying to implement phase shift keying. I generated a sine wave by using DDS. In order to attain appropriate phases, i just manipulated the phase increments (or address counter increments) in my DDS.

Can anybody tell me the pros and cons for this?
Newbie as i am, im not sure how to implement the demodulator with the way that i implemented my modulator..

thanks

Following application note is missing fron site please upload it here.
http://www.@ltera.com/literature/an/an281.pdf

Thanks a lot