[SOLVED] [PrimeTime(STA)] Why transition time is "0" in my design?

Hi. All,

I have one question about my PrimeTime results.

To see the timing reports of gate-level design, I ran the PrimeTime.

The results of the command ("report_timing -transition_time ......") is as follows:

***********************************************************
Startpoint: u_decode/control_state_reg_1_
(rising edge-triggered flip-flop clocked by i_clk)
Endpoint: u_decode/saved_current_instruction_reg_12_
(rising edge-triggered flip-flop clocked by i_clk)
Path Group: i_clk
Path Type: max

Point Trans Incr Path
-----------------------------------------------------------------------------
clock i_clk (rise edge) 0.00000 0.00000 0.00000
clock network delay (ideal) 0.00000 0.00000
u_decode/control_state_reg_1_/CK (DFFRPQ_X4M_A12TR)
0.00000 0.00000 0.00000 r
u_decode/control_state_reg_1_/Q (DFFRPQ_X4M_A12TR)
0.00000 0.06600 * 0.06600 f
u_decode/U3710/A (INV_X4M_A12TR) 0.00000 0.00000 * 0.06600 f
u_decode/U3710/Y (INV_X4M_A12TR) 0.00000 0.02100 * 0.08700 r
u_decode/U645/B (NAND2_X4M_A12TR) 0.00000 0.00000 * 0.08700 r
u_decode/U645/Y (NAND2_X4M_A12TR) 0.00000 0.01600 * 0.10300 f
u_decode/U644/A (INV_X4M_A12TR) 0.00000 0.00000 * 0.10300 f
u_decode/U644/Y (INV_X4M_A12TR) 0.00000 0.01200 * 0.11500 r
...
...
...
**********************************************************

The results show that the in/output transition times (Trans) of all gates are "0"s, as can be seen below.

So... I thought it doesn't make sense.

In order to see the timing in detail, I also run the command ("report_delay_calculation -from u_decode/U644/A -to u_decode/U644/Y") which shows the transition time of one inverter gate.

The results are as belows:
**********************************************************
From pin: u_decode/U644/A
To pin: u_decode/U644/Y
Main Library Units: 1ns 1pF 1kOhm

Library: 'sc12_base_v31_rvt_soi12s0_ss_nominal_max_0p90v_125c_mxs'
Library Units: 1ns 1pF 1kOhm
Library Cell: 'INV_X4M_A12TR'
arc sense: negative_unate
arc type: cell
Backannotation
Annotated max rise cell delay: 0.0120
Annotated max fall cell delay: 0.0110

Information: PrimeTime did not compute a valid 'rise' transition at input;
report_delay_calculation will use zero instead. (DEL-016)
Information: PrimeTime did not compute a valid 'fall' transition at input;
report_delay_calculation will use zero instead. (DEL-016)
Units: 1ns 1pF 1kOhm


Rise Delay

cell delay = 0.00699492
Table is indexed by
(X) input_pin_transition = 0
(Y) output_net_total_cap = 0.0145764
Relevant portion of lookup table:
(X) 0.0023 (X) 0.0079
(Y) 0.0083 (Z) 0.0056 (Z) 0.0073
(Y) 0.0369 (Z) 0.0149 (Z) 0.0166

Z = A + B*X + C*Y + D*X*Y
A = 0.0023 B = 0.2906
C = 0.3240 D = 0.1109

Z = 0.00699492
scaling result for operating conditions
multiplying by 1 gives 0.00699492

Fall Delay

cell delay = 0.00618425
Table is indexed by
(X) input_pin_transition = 0
(Y) output_net_total_cap = 0.0141344
Relevant portion of lookup table:
(X) 0.0023 (X) 0.0079
(Y) 0.0083 (Z) 0.0051 (Z) 0.0067
(Y) 0.0369 (Z) 0.0136 (Z) 0.0152

Z = A + B*X + C*Y + D*X*Y
A = 0.0020 B = 0.2917
C = 0.2964 D = -0.3018

Z = 0.00618425
scaling result for operating conditions
multiplying by 1 gives 0.00618425

Cell Delay
rise: 0.00699492
fall: 0.00618425

Rise delay = 0.00699492
Fall delay = 0.00618425

Transition time calculation supressed.
**********************************************************

It also shows that input_pin_transition (X) is "0".

I still don't get the cause which makes the transition time 0.

The last line of the result file is very suspicious to me.
"Transition time calculation supressed."

It might be a clue to solve this problem.

Please give me any suggestion if you have had similar situation.

I would really appreciate it.

Thank you.

Problem solved. It was due to wrong sdf file.

Thank you.