korgull
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Hi,
I am presently stuck trying to figure out if I can even do this in Verilog. What I have is a recursive instantiation of a module (gf_mult_pipe).. a variable pipelined Karatsuba multiplier. As seen in the code below, I am trying to figure out a way that the value for "PIPE_STAGES" can change depending on what it was previously. For example, in this code, if the number of pipelines specified in the beginning of compilation is 5, then the first instance of the modules will have "PIPE_STAGES" equal to 5, the next, "PIPE_STAGES" will equal 3, then 1, then lastly 1 again until the value for "WIDTH" reaches a certain value (it decrements by half for each instantiation).
I get the feeling that I cannot use "genvar" to do this because I am not using a loop. I don't think it can be an integer either (but haven't tried yet). Previously, I just had the instantiations within each of the "if (PIPE_STAGES... )", resulting in three "if" blocks containing instantiations of "gf_mult_pipe". However, while it compiles and produces the correct result in Modelsim, I think this is causing additional logic to be synthesized in Quartus, so I would like to have my "if" statements generate a value to be fed to .PIPE_STAGES and only call the instances for "gf_mult_pipe_ once.
Any clues? Or am I stuck calling them out discretely like I was?
thanks
I am presently stuck trying to figure out if I can even do this in Verilog. What I have is a recursive instantiation of a module (gf_mult_pipe).. a variable pipelined Karatsuba multiplier. As seen in the code below, I am trying to figure out a way that the value for "PIPE_STAGES" can change depending on what it was previously. For example, in this code, if the number of pipelines specified in the beginning of compilation is 5, then the first instance of the modules will have "PIPE_STAGES" equal to 5, the next, "PIPE_STAGES" will equal 3, then 1, then lastly 1 again until the value for "WIDTH" reaches a certain value (it decrements by half for each instantiation).
I get the feeling that I cannot use "genvar" to do this because I am not using a loop. I don't think it can be an integer either (but haven't tried yet). Previously, I just had the instantiations within each of the "if (PIPE_STAGES... )", resulting in three "if" blocks containing instantiations of "gf_mult_pipe". However, while it compiles and produces the correct result in Modelsim, I think this is causing additional logic to be synthesized in Quartus, so I would like to have my "if" statements generate a value to be fed to .PIPE_STAGES and only call the instances for "gf_mult_pipe_ once.
Any clues? Or am I stuck calling them out discretely like I was?
thanks
Code:
module gf_mult_pipe
[CODE HERE]
//--------------------------------------------------------------------------------------------------------------------
// Generate description
//--------------------------------------------------------------------------------------------------------------------
genvar pipe;
generate
[SOME CODE HERE]
// Main Karatsuba multiplier instantiations
// ** THIS IS WHAT I AM STUCK ON...***
// HOW DO I MAKE THE PIPELINE VALUE CHANGE FOR THE NEXT
// INSTANCE DEPENDING ON WHAT THE CURRENT PIPELINE
// VALUE IS???
if (PIPE_STAGES > 2)
begin
pipe = PIPE_STAGES - 2;
// in this section, as long as the number of PIPE_STAGES > 2, subtract two from the
// result because both the splitter and alignment circuits will get registers
end
else if (PIPE_STAGES == 2)
begin
pipe = 1;
// Making the number of stages = 1 because when the number of stages = 2, only
// the alignment circuit will get a register.. that is, until the WIDTH == CUTOFF
end
else
begin
pipe = PIPE_STAGES;
end
gf_mult_pipe
#(.WIDTH(WIDTH/2), .CUTOFF(CUTOFF), .PIPE_STAGES(pipe))
I1
(
.in1(a1),
.in2(b1),
.clk(clk),
.out(mult1)
);
[more instances here]
endgenerate
endmodule