Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

how to sim dc PSRR/CMRR

Status
Not open for further replies.
Z

zeldazzz

Junior Member level 3
Joined
Jun 23, 2005
Messages
27
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,445
PSRR and CMRR is worsen by the mismatch of the device. How to simulate it in spectre to get the reasonably close to reality result without using monte carlo. Thank you.
 

I believe you'll find your DC CMRR and PSRR dominated by Early voltage and
bias deviations, more than Vbe / VT mismatch. The question you have to
ask is whether these aspects are well modeled. This is the only way to get
"reasonably close", and it's not something we can help you with - it's between
you, the foundry and your ability to verify model accuracy where it counts.

If you're convinced that mismatch is the primary issue, then put mismatch
sources all over your circuit and shotgun it with parametric analysis. MOS
is easy, just a series gate vdc. Making the mismatch reasonable per area is
on you.

But I think your effort is better spent elsewhere.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top