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how to generate almost full and almost empty signal in async FIFO

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hi,

In your memory(FIFO) if the read address and write address are equal then the FIFO is empty"wr_add[n:0]==rd_add[n:0]" and where as in Full case, you should ~the MSB of write address and then compare the wr_add and rd_add if both are equal then you can say FIFO is full else FIFO is not full.."{~wr_add[n],wr_add[n-1:0]} == rd_add[n:0]"
 
sathi.repala said:
hi,

In your memory(FIFO) if the read address and write address are equal then the FIFO is empty"wr_add[n:0]==rd_add[n:0]" and where as in Full case, you should ~the MSB of write address and then compare the wr_add and rd_add if both are equal then you can say FIFO is full else FIFO is not full.."{~wr_add[n],wr_add[n-1:0]} == rd_add[n:0]"
Click to expand...

I'm asking about "Almost Full" and "Almost Empty" flags, you are telling me about "Full" and "Empty" flags.
 

umairsiddiqui said:
I'm asking about "Almost Full" and "Almost Empty" flags, you are telling me about "Full" and "Empty" flags.
Click to expand...

hi,
am sorry,

then you need to define a variable pointer_difference, compare the both wr_add_ptr and rd_add_ptr and store the difference in pointer_difference so that you can estimate weather FIFO is almost_full or almost_empty.
go through this link you may gain more knowledge about FIFO..

ASIC-SoC-VLSI Design: New Asynchronous FIFO Design

i hope that it will helpful to you:roll::roll::!:
 
sathi.repala said:
hi,
am sorry,

then you need to define a variable pointer_difference, compare the both wr_add_ptr and rd_add_ptr and store the difference in pointer_difference so that you can estimate weather FIFO is almost_full or almost_empty.
go through this link you may gain more knowledge about FIFO..

ASIC-SoC-VLSI Design: New Asynchronous FIFO Design

i hope that it will helpful to you:roll::roll::!:
Click to expand...

that design has a problem...

Code: 
always @(*) //pointer difference is evaluated for both clock edges

begin

if(w_ptr>r_ptr)

ptr_diff<=w_ptr-r_ptr;

else if(w_ptr)

ptr_diff<=((f_depth-r_ptr)+w_ptr);

else ptr_diff<=0; end

you can't compare two counters with gates, when the two counters are running on different clocks. The results from the comparison will not always be stable on any given clock edge, due to possible recent count on the edge of the other clock.
 

Hello! I have the same question. Have you found a solution for "Almost Full" and "Almost Empty" flags?
 

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