Programming the PCI Base Address Register

Anyone ever made a PCI Base Address Register configuration routine or something similar ? After disassembling my computer's BIOS I found a routine that I suspect is the routine to do this job. But I'm lack of fundamental understanding of how to relocate the mapping of the PCI chips/cards in the x86 system memory space. All I know that the routine need to write the value into Base Address Register to be used in a similar fashion as the "hidden" descriptor cache inside x86 segment registers for a memory mapped PCI devices in an x86 platform. As for the I/O mapped PCI devices, I'm totally blind about it. Also, I really keen to know, is the corresponding PCI card device driver relocate the device in the system memory space during OS (Windows or linux or other OS) boot eventhough it has been done by the BIOS ?

If I remember well there is a procedure how to do PCI configuration in the PCI spec itself.

Basically you write 0xFFFFFFFF to the BAR, then read back to see which bits are hardwired to zero. These bits determine the size of the address area you need to reserve in the memory map. You do this for all BARs in all cards, determine a valid layout without address conflicts, and write the addresses to the BAR. You also need to enable responses to memory or IO cycles once the BAR is valid.

Relocation or not is according to the settings in the BIOS. The setting "PnP OS" determines whether the BIOS does the job or leaves it up to the plug-n-play routines in the OS.

vomit said:

...You also need to enable responses to memory or IO cycles once the BAR is valid. ...

Click to expand...

how to do this? all I can found in the specification mentioned that the bit 0 of the BAR (which is hardwired) only determines the type of the address mapping, i.e. into memory space or into I/O space. Or do you mean that writing a value that resembles the type of addressing into command register (bit that controls the memory space or I/O space) is enough for this ?