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Standard Decaps in Industry

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tasctasc

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Hello,
Just wondering if anyone is able to tell me what the typical decap structures used in industry look like? Are they generally MOScaps or some other structure? Are the same structures used for whitespace decaps as well as those used within standards cells?
Thank you in advance :eek:)
 

What's your meaning for Decap? Decoupling Capacitor?
 

Yes, on-chip decoupling capacitors = decaps. :-D
 

Thank you mister_rf for your kind response and for sending the link to the document. I'm familiar with the document and have read numerous papers on decaps, however, I was curious about what the general practice in industry was regarding decaps. Which structures are preferred, sizing, layout details, etc.?
 

MIM cap, MOM cap, PIP cap can be used too.
It depends on application requirement, like substrate noise.
MOS varactor can achieve smaller die size in some cases.
 

tasctasc said:
Hello,
Just wondering if anyone is able to tell me what the typical decap structures used in industry look like? Are they generally MOScaps or some other structure? Are the same structures used for whitespace decaps as well as those used within standards cells?
Thank you in advance :eek:)
Click to expand...

The application might demand different types of decoupling, decoupling of RF components and current limiting in case of defects tend to require a compromise.

For an idea of what solutions are common have a look at std cell libraries e.g. ARM in TSMC 65nm has an interesting solution but I am not at liberty to discuss it
 
Junction capacitor can be used too.
 

When decoupling, pay attention to the root square of the product Lbond x Cdecap with :
- Lbond = bonding wire inductance
- Cdecap = decoupling capacitance
It can resonate with your circuit application frequency anf create a lot of spur in your signals !
A trick is to add a damping resistor in series with your decoupling capacitors.

For your culture : Decap usually mean decaping package = opening package
 

Thank you leo_02, dgnani and okguy for your responses. Your help is much appreciated.

Thank you dgnani for directing me to ARM. Unfortunately I do not have access to it. Any hints on whereI can find some information would be appreciated :eek:) (a paper, presentation, website, etc.) although I realize this may be difficult to come by.

---------- Post added at 19:35 ---------- Previous post was at 19:35 ----------

Also, does anyone know if isolation switches are commonly used with decaps?
 

Hello, I am looking for on-chip capacitors with large value to do power delivery unit design. It requires the capacitor can be charged and discharged in a large range like 0 to 1.2 V. And I find MOS cap has a very large capacitance variation cause by Vgate between 0 to 1V. I would like to use MIM cap, but it suffers larger area penalty compared to MOS cap. Do you have any solution for achieving large capacitance density with a acceptable area? Thank you very much.
 

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