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fabrication process of ic

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xierian

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regarding to "etched field-oxide isolation" in fabrication process, what does its drawback means "thickness of field oxide leads to rather large oxide steps at the boundaries between active areas and isolation(field) regions."

i am ambiguous about active areas and isolation regions.

thank for advice...
 

You cut holes in the field oxide to define the active area for transistors
and then regrow a thin oxide. So you get a large step, field ox can be
thicker than lower level metal layers. Yet that metal has to traverse
that step without gross thinning or voiding to support the designed /
desired levels of current. This is difficult when the sidewall is vertical,
the metal has no really good reason to stick, thick.
 

You probably mean "bird's beak", a result of the LOCOS process that
leaves a tapered field -> gate transition into the active area. This
oxide is of inferior quality, strained and thick, leading to worse charge
trapping qualities and edge leakage.
 

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