Altium DRC Rules Download

I have a pretty compact/dense board that need to be laid out, and the generic DRC rules that we are using in Altium are just that... generic; no one here really has a good feeling for properly setting them either. Could anyone send me a copy of their rules which correspond to Advanced Circuits' manufacturing capabilities for 62mil boards?

DRC rules are set roughly according to trace width, clearance, placement, via and hole specifications, further settings including rules by areas, high speed design settings (differential pair, length matching).

You just need to set accordingly, rules from other people might just apply to their own company standard only. Besides, do you want to comply to any international standards such as UL, IPC, etc?

I would suggest 3 things:

1. select a capable PCB manufacturer, and ask them to send you their detailed design guidelines (manufacturing capabilities). Use that for some of the rule values.

2. find a PCB design guide in Google for a similar processor or FPGA that you are using, to get rule values for high-speed rules.

3. read my article about Altium high-speed constraints:
**broken link removed**

nelsonys said:

You just need to set accordingly, rules from other people might just apply to their own company standard only. Besides, do you want to comply to any international standards such as UL, IPC, etc?

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We don't have company standards, as everyone doing board layout is self taught. What/where are the UL. IPC, CE, etc. standards and how do they apply to board layout?

buenos said:

1. select a capable PCB manufacturer, and ask them to send you their detailed design guidelines (manufacturing capabilities). Use that for some of the rule values.
2. find a PCB design guide in Google for a similar processor or FPGA that you are using, to get rule values for high-speed rules.
3. read my article about Altium high-speed constraints:
**broken link removed**

Click to expand...

We generally use Advanced Circuits, and Sierra as they are quite capable. The datasheets for the components i am using all specify their differential and single ended parameters which i will specify in the rules, however being that the fab house has minimum set of capabilities that they can't fabricate beyond i was hoping that there was a set of rules that i could import that wouldn't allow me to layout something that's not possible to fabricate. That you for the link to that document! I read it a few days ago and is very timely as they use AD10.

something more specific? some numbers please...

buenos said:

something more specific? some numbers please...

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The current board I am laying out is a self contained (power regulation and management on board) COM Express carrier board which supports several USB, SATA, PCIe, GIG-E, Compact Flash, and VGA connections. The input supply rail is 18-58V. The PICMG Com Express Carrier Board Design Guide sections 6.4 & 6.5 discuss the trace routing guidelines for all of these single ended and differential signals which can be found here: **broken link removed**

Advanced Circuits fabrication limitations can be found here: **broken link removed**

which parameters are a problem for you, what values, in your current design?
trace width, antipad size...
for example they can make no smaller than 75um wide tracks. Did you want to make narrower tracks?
This is what I meant by specific.

I am interested in their standard process, avoiding their more exotic (read: expensive) micro-vias, laser cut holes, etc. processes. I am running into translation issues as well as issues with terminology between AC's documentation and Altium's Rules; the items i need to specify in Altium are:

Ok, what i use for my complex digital boards (not carriers but processor boards):
track: min 100um (some cases min 80um on inner), 125um might be cheaper at some places, 200um a lot cheaper. I use 100um always.
gap: min 100um, 125um might be cheaper at some places, 200um a lot cheaper. I use 100um always.
of course they require thin copper layers, usually 17um (+25um plating on outer).
0.5mm via pad with 0.15mm finished hole (0.25mm drill diameter)
50-70um solder mask expansion is needed for some BGAs, but 100um is pretty standard, make sure no tracks will be exposed next to pads.
plane connect: vias always full-contact,THT-pads are big so set something big for them.
I use 250-300um gap between drill and plane in antipads
min THT hole is usually 0.15mm finished 0.25mm drill-head. all serious companies can make it.
50-100um min soldermask sliver


These a pretty much standard, you can find lots of companies in Europe/nAmerica/Asia who do this in mass production.

Excellent! Thank you!

As for my other question... What/where are the UL. IPC, CE, etc. standards and how do they apply to board layout?

buenos said:

something more specific? some numbers please...

Click to expand...

Sunstone Circuits (www.sunstone.com) offers a fully-characterized set of DRCS for Altium in their downloads page. They call it DFM Add-Ons for Altium. Very handy to have the prototype fab doing all that detailed rule writing for you already.

Try going to Sunstone Circuits website. They have an Altium file for download that has conservative DRC setting added. Here is a file, with numbers, should keep you out of trouble

I hope PCB fabrication shops will start creating custom DRC rules for the different PCB layout softwares used in the industry so it would be easier for the designer to take care of the checking during and after completing the design.

For example, I'd like to send my design to **broken link removed**.
I need to check their **broken link removed** so I could setup my DRC matrix.
Their DFM review is great, design questions were caught quickly.

Hi! I have been using HASL surface finish for years. And I am trying to replace it by ENIG as I am introducing BGAs into my design. Does the Bittele company uses high quality ENIG surface finish with an affordable price?