ptjw
Junior Member level 3
hello all,
i have mentioned a few weeks ago that i am trying to implement SPI interface with an FPGA to a SD card,
i have found some sample code online from Steven Merrifield's website and i have been trying to digest and understand his code and i have a problem trying to understand one portion of it:
his full code is available here : https://stevenmerrifield.com/tools/sd.vhd i only pasted a portion of it here.
for the portion of code i pasted above, he receives 1 byte before going to the return state which in this case is POLL CMD. In POLL CMD he checks if recv_data(0) is 0 before going to idle, otherwise it will go to CMD 55.
I went through the SD card specs and saw that after sending ACMD 41 the card will have a 48-bit reply and the first byte of the reply (from 47:0) consists of the start bit, transmission bit, and six bits of '1's.
how does this work out on his code? from what i see it seems that the code will always go to CMD55 each time it goes to POLL CMD...i guess i am missing something here...?
why does he wait for recv_data(0) (which is the response from the SD card) to be 0? and why only receive one byte of response before doing that check?
thanks all!
i have mentioned a few weeks ago that i am trying to implement SPI interface with an FPGA to a SD card,
i have found some sample code online from Steven Merrifield's website and i have been trying to digest and understand his code and i have a problem trying to understand one portion of it:
Code:
when CMD41 =>
cmd_out <= x"FF690000000001"; -- 41d OR 40h = 69h
bit_counter := 55;
return_state <= POLL_CMD;
state <= SEND_CMD;
when SEND_CMD =>
if (sclk_sig = '1') then
if (bit_counter = 0) then
state <= RECEIVE_BYTE_WAIT;
else
bit_counter := bit_counter - 1;
cmd_out <= cmd_out(54 downto 0) & '1';
end if;
end if;
sclk_sig <= not sclk_sig;
when RECEIVE_BYTE_WAIT =>
if (sclk_sig = '1') then
if (miso = '0') then
recv_data <= (others => '0');
if (response_mode='0') then
bit_counter := 3; -- already read bits 7..4
else
bit_counter := 6; -- already read bit 7
end if;
state <= RECEIVE_BYTE;
end if;
end if;
sclk_sig <= not sclk_sig;
when RECEIVE_BYTE =>
if (sclk_sig = '1') then
recv_data <= recv_data(6 downto 0) & miso;
if (bit_counter = 0) then
state <= return_state;
dout <= recv_data(6 downto 0) & miso;
else
bit_counter := bit_counter - 1;
end if;
end if;
sclk_sig <= not sclk_sig;
when POLL_CMD =>
if (recv_data(0) = '0') then
state <= IDLE;
else
state <= CMD55;
end if;
sclk <= sclk_sig;
mosi <= cmd_out(55) when cmd_mode='1' else data_sig(7);his full code is available here : https://stevenmerrifield.com/tools/sd.vhd i only pasted a portion of it here.
for the portion of code i pasted above, he receives 1 byte before going to the return state which in this case is POLL CMD. In POLL CMD he checks if recv_data(0) is 0 before going to idle, otherwise it will go to CMD 55.
I went through the SD card specs and saw that after sending ACMD 41 the card will have a 48-bit reply and the first byte of the reply (from 47:0) consists of the start bit, transmission bit, and six bits of '1's.
how does this work out on his code? from what i see it seems that the code will always go to CMD55 each time it goes to POLL CMD...i guess i am missing something here...?
why does he wait for recv_data(0) (which is the response from the SD card) to be 0? and why only receive one byte of response before doing that check?
thanks all!
