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[SOLVED] Help in multiplication using VHDL

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himajam

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Hi, I am newbee to VHDL.
can anyone help me in implementing this multiplication using VHDL?

X = 0.2 * 0.05

Else any idea like how to proceeed?

Thanks in advance...
 

Library ieee;
use ieee.std_logic_1164.all
use ieee.std_logic_arith.all;

entity mul is
(
a : in std_logic_vector(15 downto 0);
b : in std_logic_vector(15 downto 0);
prd : out std_logic_vector(31 downto 0)
);

architecture behav of mul is
begin

prd <= a * b;
end
--------------------
Use the above code
 

Use the above code
Click to expand...
You should mention, that a fixed point number representation will be needed. The question isn't quite clear, because it misses a number range and resolution specification.
 

use ieee.std_logic_unsigned.all. If any other library..please let me know
 

The fixed point packages would be much more useful for fixed point.
 

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