TSMC SoC Integration Methodology Guide for ARM Core Based

TSMC SoC Integration Methodology Guide for ARM Core Based Design

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Re: TSMC SoC Integration Methodology Guide for ARM Core Base

Table of contents
1. Introduction................................................................................................................3
2. Methodology Validation.............................................................................................5
2.1 Execution Summary.........................................................................................6
2.2 ARM Deliverables............................................................................................7
2.3 Test Vehicle ......................................................................................................8
2.4 Design Flow .....................................................................................................9
2.5 Implementation Details .................................................................................. 11
3. Recommendation to Users .......................................................................................13
3.1 Simulation......................................................................................................14
3.2 Synthesis & STA ............................................................................................14
3.3 Design-For-Test..............................................................................................16
3.4 Formal Verification........................................................................................18
3.5 Verilog-in........................................................................................................18
3.6 Placement and Routing...................................................................................18
3.7 Long Wires .....................................................................................................20
3.8 Antenna Rule..................................................................................................21
3.9 Number of Metal Layers................................................................................21
3.10 GDS Sub-cell Naming..................................................................................22
4. Conclusions ..............................................................................................................22
5. Suggested Enhancements .........................................................................................23
6. Acknowledgements ..................................................................................................24
7. References ................................................................................................................24

Re: TSMC SoC Integration Methodology Guide for ARM Core Base

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