EDAJOBSdoctor
Newbie level 3
Description
We are inviting suitably qualified candidates to apply for future vacancies for this position.
In this position, you will be working as a member of the IC design team developing Hard IP on next-generation deep submicron process for microprocessors and System-On-Chip (SOC) ICs.
Your responsibilities will include but not be limited to:
- Performing tasks related to VLSI CMOS IC design, solid state physics, and physical layout. Such tasks may include: circuit design of high-speed or high-voltage IO [PCIe, SATA, USB2/3, DDR, HDMI, or 3.3V IO].
- Performing timing, functional and reliability analysis, and supervising physical layout designers.
- Providing support for Full-Chip Pre-Silicon and Post-Silicon Validation, System Validation, Product Test, and Quality and Reliability Engineering to ensure the implementation of feature sets in the final product.
Qualifications
For this position, you should possess a BSc/MSc in Electronics/Computer Engineering with at least 1-3 years relevant work experience (PhD holders without work experience are encouraged to apply). The candidate should have strong analytical skills, and be able to work independently and at various levels of abstraction. Any amount of relevant experience in analog circuit design and analysis would be an added advantage. Additional qualifications include:
o Strong background in high-speed serial interfaces (>2.5 Gb/s) e.g. PCIe2, USB2 and HDMI.
o High-voltage interface in sub-micron process e.g. DDR, GPIO and HDMI.
o Experience with VLSI circuit layout.
o Experience with UNIX operating environment, Cadence design tools, PERLSCRIPT, and Ocean script.
A one-way international relocation package will be provided for candidates hired from countries outside Malaysia.
We are inviting suitably qualified candidates to apply for future vacancies for this position.
In this position, you will be working as a member of the IC design team developing Hard IP on next-generation deep submicron process for microprocessors and System-On-Chip (SOC) ICs.
Your responsibilities will include but not be limited to:
- Performing tasks related to VLSI CMOS IC design, solid state physics, and physical layout. Such tasks may include: circuit design of high-speed or high-voltage IO [PCIe, SATA, USB2/3, DDR, HDMI, or 3.3V IO].
- Performing timing, functional and reliability analysis, and supervising physical layout designers.
- Providing support for Full-Chip Pre-Silicon and Post-Silicon Validation, System Validation, Product Test, and Quality and Reliability Engineering to ensure the implementation of feature sets in the final product.
Qualifications
For this position, you should possess a BSc/MSc in Electronics/Computer Engineering with at least 1-3 years relevant work experience (PhD holders without work experience are encouraged to apply). The candidate should have strong analytical skills, and be able to work independently and at various levels of abstraction. Any amount of relevant experience in analog circuit design and analysis would be an added advantage. Additional qualifications include:
o Strong background in high-speed serial interfaces (>2.5 Gb/s) e.g. PCIe2, USB2 and HDMI.
o High-voltage interface in sub-micron process e.g. DDR, GPIO and HDMI.
o Experience with VLSI circuit layout.
o Experience with UNIX operating environment, Cadence design tools, PERLSCRIPT, and Ocean script.
A one-way international relocation package will be provided for candidates hired from countries outside Malaysia.
