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You really need to give more information (the .pcb file would help). The clearance is set in the DRC. So, I would assume that the default clearances you are using are too large for the components.
Your clearance problem is because you have set net "CLASSES". You have defined 1.4mm clearance for all power lines which cannot be achieved on the package. Type CLASS as the command prompt to see the net classes. I suggest you stick with default net classes to begin with.
Other problems:
1. you have a bizarrre 4 layer build of (((1*2)+15)*16). I assume it is just a standard 2 layer board so would be (1*16). I suggest you load the default.dru design rules which will fix that.
2. you have some vias connecting layer 1 and 15 and layer 1 and 2. I think you should only really be using layers 1 and 16.
3. your grid is 0.01mm. Grids are very helpful if you set them at something sensible such as 0.127mm but if you make them very fine then they make things harder for you.
I could figure it out where the problem is. Now there is no more clearance error in my design.
But... I come with new problem... that is regarding traces.
even auto route is not able to trace some of the traces, even when I try to trace them manually still that original trace is occuring its not disappering..
I am attaching file which explains this problem. can please help me with this.
I suggest you start again! The net classes are causing problems. You still have a strange layer setup. Use just two layers. Manually route. It might be worthwhile going through one of the many tutorials you can find on the internet before you start your own board. I suggest you start with a clean file and don't use net classes. Use the default.dru design rules. I have tried to tidy it up a bit but it would be better to start again.
Actually this is just a sub circuit of my whole complicated circuit, so for that circuit I need to have 4-layer board, I want to dedicate 2 layers for +VCC and -VCC.
I cannot just use 2-layer board. First I want to be successful with this simple circuit after that I am planning to design whole circuit.
And one more thing, I am not seeing this problem when I use through hole component of AD817.
Well, if you want a 4 layer board, make the layer build correct. You have (((1*2)+15)*16) whereas a more likely build is (1+2*15+16).
The reason you don't see the problem with a through hole AD817 is the pitch of the legs is greater so the routing can be done. With the net class rules you have defined of 2mm minimum width for GND, 1mm fo VCC and 0.6mm clearance it just cannot be done with the surface mount device.
As I said - avoid net classes for now. Manually route things. While I would normally use wide tracks for power, when you get to the pad of a 0.5mm pitch device you cannot maintain the width.
Keith,
If i build 4-layer setup as (1+2*15+16). It is not allowing me to make vias from 1 to 2 and from 1 to15 layers, it is only allowing me to make a via between 1 and 16 layers.
Are you really going to use blind/buried vias? Even if you are, that isn't a correct layer build.
I think you are misunderstanding the vias. Normally a via on a 4 layer board would connect from the top layer to the bottom. You can then connect to it to any of the layers inbetween. So, just start the track on the top or bottom layer & switch to an inner layer and the via goes right through the board.
Are you really sure you can get your board made with blind vias from 1 to 2 and 1 to 15? Also, why do you want to use blind vias? I realise you say that the whole circuit will be more complicated, but complicated boards still don't need blind vias.
In my circuit I have two power supplies let's assume +VCC and -VCC and I need to use them in many places of my circuit, so for that purpose I thought I will dedicate +VCC to one layer (layer 2) and -VCC to another layer (layer 15). I am thinking to put two vias to those layers layer 2 and 15, so that I can use them in my circuit wherever I need them without too many traces.
Can you please suggest me the better way to acheive this and also can you please tell me whether I am thinking in a right direction.
Thank you very much keith for your patience , Really appreciate that.
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