LPC2368 ADC Maximum sampling frequency

Hi all,
I am starting to work with LPC2368 and use its ADC in my project
I want to use its ADC to sample from 4 channels with rate of 12KBps on each channel, but I don't know about its ADC in details for example I don't know how much ADC Acquisition time is when we change the channel or how much it will take to produce a sample?
I searched in LPC23XX user manual but I didn't find such issues there?

Another question is about its USB, is there any driver for its USB? I found some examples of audio device with USB but I want to send and receive data to PC.

can anybody help me with this information?

thanks in advance.
Hossein,

www.keil.com/dd/docs/datashts/philips/lpc23xx_um.pdf

Page 596

A programmable divider is included in each converter to scale this clock to the 4.5MHz (max) clock needed by the successive approximation process.
A fully accurate conversion requires 11 of these clocks.

Click to expand...

The ARM has a crystal, the frequency of the crystal is multiplied with the pll to give the internal clk (up to 60MHz normally),
there is a peripheral clock (APB) which feeds all the peripherals, it can work at the core clock frequency or 1/2 of that or 1/4.

The ADC clock (can be 4.5MHz max) will have a clock of APB / (CLKDIV+1)
the CKLDIV is a value used by the AD to divide the clock, when it is 0 the APB is divided by 1, when it is 1 the APB is divided by 2 etc.

You can use the ADC in burst mode and enable the 4 channels you need, it will do repeated conversions starting from the lowest channel and going to the last and then redo from start.

for 10 bit accuracy the conversion takes 11 ADC clocks, 11* 4(ch) * 12000(samples)=528000Hz
this should be your ADC clock

for example with a core clock of 60MHz and APB at 1/4 (15MHz) you should set the CLKDIV to:

528000=15000000/(CLKDIV+1)
CLKDIV=(15000000/528000)-1=27.4 so use a little faster clock which is CLKDIV=27, ADC clock will be 535714Hz ,
which will result in 12.175Ksamples/channel

Alex

Hi Alex,
Thank you for your comment and consideration.
I think ADCs on microcontrollers have an A/D converter which is shared between input channels and as I read for PIC microcontrollers there is an acquisition time for ADC after channel change which means the minimum time which is needed for charge capacitor to be charged after channel select and before conversion starts. from your description I assume that this time should be zero fro LPC23XX ADC, shouldn't be? if not, is there any equation in datasheet to calculate this time?
Another question is that why nxp didn't give any clear architectural diagram of ADC or other peripherals of chip?!
I have that user manual you referenced but there, I couldn't find any block diagram of ADC nor for other peripherals!. I want to know where I can find it?

Regards,
Hossein Moradi

I didn't see an adc data block either, there is only one for the complete mcu with all stages in the datasheet but it is not detailed.
There isn't any delay mentioned in the datasheet and it says that in burst mode :

"The AD converter does repeated conversions at the rate selected by the CLKS field,
scanning (if necessary) through the pins selected by 1s in the SEL field. The first
conversion after the start corresponds to the least-significant 1 in the SEL field, then
higher numbered 1bits (pins) if applicable. Repeated conversions can be terminated by
clearing this bit, but the conversion that’s in progress when this bit is cleared will be
completed."

so i can only assume that there isn't one.
The ADC stage is the same in all LPC21xx series (and 23xx has the same) but i haven't read any delay in the other datasheets either.

Alex

taskmn57 said:

Hi all,
I am starting to work with LPC2368 and use its ADC in my project
I want to use its ADC to sample from 4 channels with rate of 12KBps on each channel, but I don't know about its ADC in details for example I don't know how much ADC Acquisition time is when we change the channel or how much it will take to produce a sample?
I searched in LPC23XX user manual but I didn't find such issues there?

thanks in advance.
Hossein,

Click to expand...

Hi,
the ADC of the 23xx can sample > 200 ks/sec. While I do not understand your your KBps (did you mean ksps?) the answer to your question is Yes. A VW Golf that is specified for 180 km/h max, can also go at 15 km/h.
If you looked a little closer at the 11 clocks mentioned by alexan_e you could imagine that sample time is actually one clock and 10 clocks to evaluate the charge in the internal capacitor.
Your analog source needs to be strong enough to charge the internal cap to 99.9% within one ADC clock cycle. I do not recall the value for the internal cap but I leave this calculation up to you. If you have a very high impedance sensor, you should first slow down the clock for the ADC and if needed amplify the signal. Other than that, if your signal is not in the 100s of kOhm you should be fine.
hth, Bob