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how to use FPGA to evaluate power or performance of an ASIC?

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kandi

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plz let me know if anyone has some idea about the above issue.

Thanks
ARUN
 

I use Altera Quartus II for implementation on FPGA by Verilog HDL and the following is my experience. First, it's almost the same for the syntax compiled by Quartus II and it's similar to language of Verilog 2001. You can directly compile the design and check if there is some unsynthesised. Second, for test bench writting, I often use Nios II IDE or pattern generator as input and output by Nios or Logic Analyzer to check out the result. The most difference between ASIC and FPGA is that you may have to setup the pin assignment on FPGA since it's real hardware. Hope this helpful for you.
 
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    kandi

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I don't think there is a good power correlation between FPGA prototype and ASIC. Performance wise, it is hard to make a prediction of ASIC from FPGA either. The only thing FPGA can do for you is to validate the correctness of the logic - it runs fast.
 

How could I evaluate the performance of the ASIC chip using FPGA ? I am using Virtex-4 FPGA, to find performance of ASIC chip "JPEG ", Plz give me an idea.

Thanks
ARUN
 

Hi,
FPGA using the power charecteristis based on the Technology which is used (Vertex-4 as you said).
Typically in ASICs, as per the technologies 28nm, 45nm, or 65nm Power charesteric will vary and very very difficult to evaluate the exact power of an ASIC by FPGA. You can verify the functionality with FPGA, not Power!!!
-paulki
 

kandi said:
plz let me know if anyone has some idea about the above issue.

Thanks
ARUN
Click to expand...

Hi,
FPGA would be a very good option for prototyping ASIC functionality w.r.t logic verification, but for power performance it doesn't give you any valueble information, becuase of the technology differences of FPGA to ASIC and differnce in the kind of cells logic cells used in ASIC and FPGA
 

FPGA is based on LUT and FF while ASIC based on gates only.
FPGA used fixed MEMORY blocks while ASIC is custom.
FPGA PLLs differs than ASIC PLL
FPGA production technology is completly deiffernt than ASIC.

So it is not possible to evaluate power of ASIC based on FPGA.
 

As the conclusion, the advantage of implementation on FPGA is to verify its functionality. The performance and the other issue can't be derived from the statistic of FPGA since now the design library isn't the same as the ASIC. In other words, the FPGA use gate-array which is not the same as the ASIC circuit.
 

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