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  1. #1
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    CIC filter wordlength and simulink simulation problem

    Hi,
    I want to design a CIC filter which has a decimation ratio of 32, I need 10 bits at the output, and my input is 2 bits, I want 3 stages and differential delay is 1 so according to Hogenauer's paper wordlength is N*log(RM)+Bin -1=3*log(32)+2=16 bits, however I want 10 bits at the output, and again according to Hogenauer's paper the number of bits being discarded at each stage is 0,0,1,3,4,5. Anyway I want to simulate this CIC filter in Matlab Simulink, first I want to simulate the filter without discarding the bits, after I want to simulate the filter with discarding the bits, first I use

    Code:
    hm=mfilt.cicdecim(32,1,3,2,16);
    realizemdl(hm);
    and obtain simulink blocks, I use a discrete sine wave source from Signal Processing Blockset and try to simulate and see the output with a scope but the output is not the required output, after I use

    Code:
    hm=mfilt.cicdecim(32,1,3,2,10,[16 15 14 12 11 10]); 
    realizemdl(hm);
    and the output gets worse. when I use

    Code:
    hm=mfilt.cicdecim(32,1,3);
    realizemdl(hm);
    in this case the input wordlength is 16, output wordlength is 31 and I can get reasonable results, my question is how can I obtain 10 bits output when I want to design a CIC filter with a decimation ratio of 32 and simulate it with simulink ?

    thanks

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  2. #2
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    Re: CIC filter wordlength and simulink simulation problem

    (N*log(RM)+Bin -1=3*log(32)+2=16 bits) this is false because N*log(RM)+Bin -1=3*log(32)+2 = 3*3,46+2 = 12.39 = 12 bits



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