multiple constant drivers problem, how to resolve

cant resolve multiple constant drivers

I was trying to create my first program, and I was able to resolve most errors, but I don't know how to resolve this one:

Error: Can't resolve multiple constant drivers for net d0[3] at countminutes.v(63)
Error: Constant driver at countminutes.v(85)

I've looked it up and the problem is that I write to a register twice, or something like this.

In my opinion this error is wrong, but according to quartus II web edition it's a problem. can anyone tell me what I could do to fix it?

The code should count up seconds when 'clks' is pulsed. when 60 is reached it should reset to zero.
when seconds is pulsed and running==1, the counter should decrease and when it reaches zero, it should pulse 'minutes' and reset to 59 (probably this doesn't work 100% correctly but thats a ploblem I'll solve later).

thanks in advance,

martijn

code:
module countminutes
(
// {{ALTERA_ARGS_BEGIN}} DO NOT REMOVE THIS LINE!
clkm, minutes, running, d0, d1, zero
// {{ALTERA_ARGS_END}} DO NOT REMOVE THIS LINE!
);
// Port Declaration

// {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
input clkm;
input minutes;
input running;
output [3:0] d0;
output [3:0] d1;
output zero;
// {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!

reg [3:0] d0;
reg [3:0] d1;
reg zero;

always @ (posedge clkm)
begin
d1<=d1+1;
if(d1==4'd10)
begin
d0<=d0+1;
if((d0==4'd2)&(d1==4'd4))
begin
d0<=4'd0;
end
d1<=4'd1;
end
end //line 63

always @ (posedge minutes)
begin
if(running==1'b0)
begin
d1<=d1-1;
if(d1==4'd15)
begin
d0<=d0-1;
if(d0==4'd15)
begin
zero<=1;
d0<=4'd3;
end
else
begin
zero<=0;
end
d1<=4'd2;
end
end
end //line 85

endmodule

multiple constant driver

Where is your "d0[3]"?

resolve multiple constant

I'm sorry, I've got 2 modules in my program, one for minutes and one for seconds, buth modules have this problem, because they're almost identical, and I posted the error of the minutes module, and the code of the seconds module.

I've pasted the right code now in my first post.

Martijn

cant resolve multiple constant drivers for net

Well..you´re driving "d0" and "d1" in "always @ (posedge clkm)" as also in "always @ (posedge minutes)".

So normal it throws this error...but as the Quartus helpfile says: "It doesn´t has to be the signal mentioned to be in error"...


Maybe you can explain what you exactly want to achieve? A simple seconds/minutes counter with enable signal?

cant resolve multiple constant drivers

yes, it has to be a simple counter with 4 bit outputs per digit in order to convert it to 7 segment in an other block.

the counter has to count up with a minutes button, and a seconds button, but once a pin goes high it should count down and ignore the seconds and minutes buttons.

hope this helps..
https://vhdlguru.blogspot.com/2010/03/synthesis-error-signal-is-connected-to.html