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rotary switch & buttons VHDL

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tferguson

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Hello - I am trying to create a counter that will increment and decrement based on the direction the switch is turned. The counter is easy, but how do I read the input?
 

something like this?

Code: 
process(clk)
begin
  if rising_edge(clk) then
    
    --------------------
    --Increment
    --------------------
    if switch = '1' then
      counter <= counter + 1;
      
    else
      counter <= counter - 1;
    end if;
  end if;
end process;
 

TrickyDicky said:
something like this?

Code: 
process(clk)
begin
  if rising_edge(clk) then
    
    --------------------
    --Increment
    --------------------
    if switch = '1' then
      counter <= counter + 1;
      
    else
      counter <= counter - 1;
    end if;
  end if;
end process;
Click to expand...

Thank you for the post, but the logic of the counter isn't my issue...it's how do you obtain the input from a button or switch?

T
 

You need to route the switch to a pin on the FPGA on your circuit board.
 

That sort of makes sense. The switch isn't part of the FPGA, so I need to assign an input (button or switch) that is on the board, to an input on the FPGA?

This is what I'm trying to do:

A synchronous up/down counter in VHDL that:
-Counts from 0 to FFFF.
-Uses the rotary switch to increment (rotate right) and decrement counter (rotate left).
-2 Push Buttons (pick any 2 of 4 available): one for an asynchronous reset (starts @ 0) & an a “synchronous” (hold button & rotate left or right) preset (starts @ BEEF). Need to de-bounce these switches in software.
-Write the count value to an LCD

So far, I have a counter :)

I respect and hate this stuff all at the same time :O
 

tferguson said:
That sort of makes sense. The switch isn't part of the FPGA, so I need to assign an input (button or switch) that is on the board, to an input on the FPGA?
Click to expand...

Yes. If you have a development board, the switches will already be connected to FPGA pins. You just need to map a top level input in your code to that pin on the FPGA.
 

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