Artlav
Full Member level 2
Hello.
In short, how can i read and write to a single-port SRAM at once?
In details, there are three things i have in the design:
-an SRAM that i can either write or read.
-A VGA controller that reads the SRAM and draws the content
-And some logic that writes a pattern into SRAM
At the moment whether the read or write source is uses is being toggled by a register controlled from a switch on board.
The problem is that i can't seem to find a way to have the SRAM written to and read at the same time.
I tried to toggle the source register at every clock, or some fraction of it, with chaotic results on both screen and in memory.
In theory, the proper solution seems to be to use an arbiter.
And here is the main problem - while i think i know what arbiter does and have a working sample of a simple one, i, however, have not a faintest idea how to use it to get the dual-port access i need.
The arbiter have 2 request inputs, a clock, and sets either of the 2 grant outputs.
Just setting the grant to the source register does not work.
Several attempts to link them up in ways that appeared reasonable to me produced nothing but compile errors.
So, can anyone help me figure it out?
I would appreciate a Verilog example, since i appear to miss a concept here.
In short, how can i read and write to a single-port SRAM at once?
In details, there are three things i have in the design:
-an SRAM that i can either write or read.
-A VGA controller that reads the SRAM and draws the content
-And some logic that writes a pattern into SRAM
At the moment whether the read or write source is uses is being toggled by a register controlled from a switch on board.
The problem is that i can't seem to find a way to have the SRAM written to and read at the same time.
I tried to toggle the source register at every clock, or some fraction of it, with chaotic results on both screen and in memory.
In theory, the proper solution seems to be to use an arbiter.
And here is the main problem - while i think i know what arbiter does and have a working sample of a simple one, i, however, have not a faintest idea how to use it to get the dual-port access i need.
The arbiter have 2 request inputs, a clock, and sets either of the 2 grant outputs.
Just setting the grant to the source register does not work.
Several attempts to link them up in ways that appeared reasonable to me produced nothing but compile errors.
So, can anyone help me figure it out?
I would appreciate a Verilog example, since i appear to miss a concept here.