[SOLVED] Calibre LVS PEX Warnings and Erros

Hi,
I am new to IC design using Cadance. I finished my layout and now trying to run LVS and PEX using Cadance. When I run LVS I am getting the following Warnings.

WARNING: There is no data for layout net name __USER_DEFINED_LVS_POWER_NAME__


WARNING: There is no data for layout net name __USER_DEFINED_LVS_GROUND_NAME__

WARNING: Invalid PATHCHK request "GROUND && ! POWER" : no POWER nets present, operation aborted

WARNING: Invalid PATHCHK request "POWER && ! GROUND" : no POWER nets present, operation aborted

WARNING: Invalid PATHCHK request "! POWER && GROUND" : no POWER nets present, operation aborted

Is it possible to know how to clear these warnings? Also, now when I run the PEX simulation I get the following errors

ERROR: There is no usable returns path nets in the PDB for inductance extraction.

ERROR: Net information could not be built.

ERROR: The inputs for inductance engine were not properly built.

I also get the warnings same as warnings in LVS.

Can somebody help me regarding this?

Thanks a lot!!!

Check if you have given vdd and ground pins or at least labels. Also finish LVS first before you begin pex, since pex requires lvs to be done first. In any case, it runs lvs first before doing extraction.

Also, there's an option called LVS options. There, you can also give user specified names for your supply nets. Like vdd!,gnd!, vss! etc.

shravan87 said:

Check if you have given vdd and ground pins or at least labels. Also finish LVS first before you begin pex, since pex requires lvs to be done first. In any case, it runs lvs first before doing extraction.

Also, there's an option called LVS options. There, you can also give user specified names for your supply nets. Like vdd!,gnd!, vss! etc.

Click to expand...

Hi,
Thank you for the reply. I have given all the labels for my Vg, Vd and Ground. I marked labels using Metal Labels and created pins with these labels and assigned particular metal type for the pin.

I noticed when I disable the ERC check, I won't get any warnings for my LVS run.

ERROR: There is no usable returns path nets in the PDB for inductance extraction.

The above error appears when I choose to do Inductor extraction in PEX simulation.

Is it ok if I disable ERC check and run?